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BibTeX record conf/ecctd/VohrmannGJ017
@inproceedings{DBLP:conf/ecctd/VohrmannGJ017, author = {Marten Vohrmann and Philippe Geisler and Thorsten Jungeblut and Ulrich R{\"{u}}ckert}, title = {Design-space exploration of ultra-low power {CMOS} logic gates in a 28 nm {FD-SOI} technology}, booktitle = {2017 European Conference on Circuit Theory and Design, {ECCTD} 2017, Catania, Italy, September 4-6, 2017}, pages = {1--4}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ECCTD.2017.8093232}, doi = {10.1109/ECCTD.2017.8093232}, timestamp = {Mon, 26 Jun 2023 20:46:23 +0200}, biburl = {https://dblp.org/rec/conf/ecctd/VohrmannGJ017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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