BibTeX record conf/cosade/EnderW017

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@inproceedings{DBLP:conf/cosade/EnderW017,
  author       = {Maik Ender and
                  Alexander Wild and
                  Amir Moradi},
  editor       = {Sylvain Guilley},
  title        = {SafeDRP: Yet Another Way Toward Power-Equalized Designs in {FPGA}},
  booktitle    = {Constructive Side-Channel Analysis and Secure Design - 8th International
                  Workshop, {COSADE} 2017, Paris, France, April 13-14, 2017, Revised
                  Selected Papers},
  series       = {Lecture Notes in Computer Science},
  volume       = {10348},
  pages        = {83--101},
  publisher    = {Springer},
  year         = {2017},
  url          = {https://doi.org/10.1007/978-3-319-64647-3\_6},
  doi          = {10.1007/978-3-319-64647-3\_6},
  timestamp    = {Sun, 25 Oct 2020 22:34:15 +0100},
  biburl       = {https://dblp.org/rec/conf/cosade/EnderW017.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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