BibTeX record conf/cav/CeskaMMSVV18

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@inproceedings{DBLP:conf/cav/CeskaMMSVV18,
  author    = {Milan Ceska and
               Jir{\'{\i}} Maty{\'{a}}s and
               Vojtech Mrazek and
               Luk{\'{a}}s Sekanina and
               Zdenek Vas{\'{\i}}cek and
               Tom{\'{a}}s Vojnar},
  title     = {{ADAC:} Automated Design of Approximate Circuits},
  booktitle = {Computer Aided Verification - 30th International Conference, {CAV}
               2018, Held as Part of the Federated Logic Conference, FloC 2018, Oxford,
               UK, July 14-17, 2018, Proceedings, Part {I}},
  pages     = {612--620},
  year      = {2018},
  crossref  = {DBLP:conf/cav/2018-1},
  url       = {https://doi.org/10.1007/978-3-319-96145-3\_35},
  doi       = {10.1007/978-3-319-96145-3\_35},
  timestamp = {Wed, 30 Oct 2019 16:34:37 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cav/CeskaMMSVV18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cav/2018-1,
  editor    = {Hana Chockler and
               Georg Weissenbacher},
  title     = {Computer Aided Verification - 30th International Conference, {CAV}
               2018, Held as Part of the Federated Logic Conference, FloC 2018, Oxford,
               UK, July 14-17, 2018, Proceedings, Part {I}},
  series    = {Lecture Notes in Computer Science},
  volume    = {10981},
  publisher = {Springer},
  year      = {2018},
  url       = {https://doi.org/10.1007/978-3-319-96145-3},
  doi       = {10.1007/978-3-319-96145-3},
  isbn      = {978-3-319-96144-6},
  timestamp = {Tue, 14 May 2019 10:00:43 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cav/2018-1},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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