BibTeX record conf/asscc/ZimmerCNA16

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@inproceedings{DBLP:conf/asscc/ZimmerCNA16,
  author       = {Brian Zimmer and
                  Pi{-}Feng Chiu and
                  Borivoje Nikolic and
                  Krste Asanovic},
  title        = {Reprogrammable redundancy for cache Vmin reduction in a 28nm {RISC-V}
                  processor},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
                  Japan, November 7-9, 2016},
  pages        = {121--124},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASSCC.2016.7844150},
  doi          = {10.1109/ASSCC.2016.7844150},
  timestamp    = {Mon, 26 Jun 2023 20:45:56 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ZimmerCNA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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