BibTeX record conf/aspdac/LinLTLL12

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@inproceedings{DBLP:conf/aspdac/LinLTLL12,
  author       = {Yen{-}Hung Lin and
                  Yun{-}Jian Lo and
                  Hian{-}Syun Tong and
                  Wen{-}Hao Liu and
                  Yih{-}Lang Li},
  title        = {Topology-aware buffer insertion and GPU-based massively parallel rerouting
                  for {ECO} timing optimization},
  booktitle    = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
                  {ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
  pages        = {437--442},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ASPDAC.2012.6164988},
  doi          = {10.1109/ASPDAC.2012.6164988},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/LinLTLL12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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