BibTeX record conf/aspdac/ChenZW12

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@inproceedings{DBLP:conf/aspdac/ChenZW12,
  author       = {Yiran Chen and
                  Yaojun Zhang and
                  Peiyuan Wang},
  title        = {Probabilistic design in spintronic memory and logic circuit},
  booktitle    = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
                  {ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
  pages        = {323--328},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ASPDAC.2012.6164967},
  doi          = {10.1109/ASPDAC.2012.6164967},
  timestamp    = {Mon, 04 Jul 2022 14:19:33 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/ChenZW12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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