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2020 – today
- 2023
[j3]Chao-Lin Lee
, Chen-Ting Chao, Wei-Hsu Chu, Ming-Yu Hung, Jenq-Kuen Lee:
Accelerating AI Applications with Sparse Matrix Compression in Halide. J. Signal Process. Syst. 95(5): 609-622 (2023)- 2021
- [c9]Che-Chia Lin, Chao-Lin Lee, Jenq-Kuen Lee, Howard Wang, Ming-Yu Hung:
Accelerate Binarized Neural Networks with Processing-in-Memory Enabled by RISC-V Custom Instructions. ICPP Workshops 2021: 15:1-15:8 - [c8]Hui-Hsin Liao, Chao-Lin Lee, Jenq-Kuen Lee, Wei-Chih Lai, Ming-Yu Hung, Chung-Wen Huang:
Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM. ICPP Workshops 2021: 17:1-17:7 - 2020
- [j2]Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Ming-Yu Hung, Jenq-Kuen Lee:
Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions. J. Syst. Archit. 111: 101783 (2020) - [c7]Ming-Yi Lai, Chia-Yu Sung, Jenq-Kuen Lee, Ming-Yu Hung:
Enabling Android NNAPI Flow for TVM Runtime. ICPP Workshops 2020: 3:1-3:8 - [c6]Chen-Ting Chao, Wei-Hsu Chu, Chao-Lin Lee, Jenq-Kuen Lee, Ming-Yu Hung, Hsiang-Wei Sung:
Devise Sparse Compression Schedulers to Enhance FastText Methods. ICPP Workshops 2020: 4:1-4:8
2010 – 2019
- 2019
- [c5]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Ming-Yu Hung, Chung-Wen Huang:
Accelerate DNN Performance with Sparse Matrix Compression in Halide. ICPP Workshops 2019: 14:1-14:6 - [c4]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Chung-Wen Huang, Ming-Yu Hung:
Sparse-Matrix Compression Primitives with OpenCL Framework to Support Halide. IWOCL 2019: 24:1-24:2 - 2016
- [c3]Wen-Li Shih, Cheng-Yen Lin, Ming-Yu Hung, Jenq Kuen Lee:
A Probabilistic Framework for Compiler Optimization with Multithread Power-Gating Controls. ICPP Workshops 2016: 281-288 - 2012
- [j1]Ming-Yu Hung, Peng-Sheng Chen, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee:
Support of Probabilistic Pointer Analysis in the SSA Form. IEEE Trans. Parallel Distributed Syst. 23(12): 2366-2379 (2012)
2000 – 2009
- 2005
- [c2]Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee:
Compiler Supports and Optimizations for PAC VLIW DSP Processors. LCPC 2005: 466-474 - 2003
- [c1]Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee:
Compiler support for speculative multithreading architecture with probabilistic points-to analysis. PPoPP 2003: 25-36
Coauthor Index
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