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ORCIDMeeta Srivastav
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2010 – 2019
- 2015
[j3]Meeta Srivastav, Mohammed Ehteshamuddin, Kyle Stegner, Leyla Nazhandali:
Design of Ultra-Low Power Scalable-Throughput Many-Core DSP Applications. ACM Trans. Design Autom. Electr. Syst. 20(3): 34:1-34:21 (2015)- [c9]Meeta Srivastav, Leyla Nazhandali:
Study of the impact of aging on many-core energy-efficient DSP systems. ISQED 2015: 66-70 - 2013
- [j2]Meeta Srivastav, Xu Guo, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont
:
Design and benchmarking of an ASIC with five SHA-3 finalist candidates. Microprocess. Microsystems 37(2): 246-257 (2013) - [c8]Kenneth M. Zick, Meeta Srivastav, Wei Zhang, Matthew French:
Sensing nanosecond-scale voltage attacks and natural transients in FPGAs. FPGA 2013: 101-104 - [c7]Meeta Srivastav, Yongbo Zuo, Xu Guo, Leyla Nazhandali, Patrick Schaumont:
Study of ASIC technology impact factors on performance evaluation of SHA-3 candidates. ACM Great Lakes Symposium on VLSI 2013: 345-346 - 2012
- [j1]Meeta Srivastav, Michael B. Henry, Leyla Nazhandali:
Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage. ACM Trans. Design Autom. Electr. Syst. 18(1): 3:1-3:23 (2012) - [c6]Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont:
ASIC implementations of five SHA-3 finalists. DATE 2012: 1006-1011 - [c5]Meeta Srivastav, Leyla Nazhandali:
Design and analysis of multi-core homogeneous systems for energy harvesting applications. ICECS 2012: 532-535 - [c4]Meeta Srivastav, Michael B. Henry, Leyla Nazhandali:
Design of low-power, scalable-throughput systems at near/sub threshold voltage. ISQED 2012: 609-616 - 2011
- [c3]Michael B. Henry, Meeta Srivastav, Leyla Nazhandali:
A case for NEMS-based functional-unit power gating of low-power embedded microprocessors. DAC 2011: 872-877 - [c2]Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont:
Pre-silicon Characterization of NIST SHA-3 Final Round Candidates. DSD 2011: 535-542
2000 – 2009
- 2005
- [c1]Meeta Srivastav, S. S. S. P. Rao, Himanshu Bhatnagar:
Power Reduction Technique Using Multi-vt Libraries. IWSOC 2005: 363-367
Coauthor Index
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