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2010 – 2019
- 2017
[c3]David Greenhill, Ron Ho, David M. Lewis, Herman Schmit, Kok Hong Chan, Andy Tong, Sean Atsatt, Dana How
, Peter McElheny, Keith Duwel, Jeffrey Schulz, Darren Faulkner, Gopal Iyer, George Chen, Hee Kong Phoon, Han Wooi Lim, Wei-Yee Koay, Ty Garibay:
3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. ISSCC 2017: 54-55- 2010
- [c2]Jinuk Luke Shin, Kenway W. Tam, Dawei Huang, Bruce Petrick, Ha Pham, Changku Hwang, Hongping Penny Li, Alan P. Smith, Timothy Johnson, Francis Schumacher, David Greenhill, Ana Sonia Leon, Allan Strong:
A 40nm 16-core 128-thread CMT SPARC SoC processor. ISSCC 2010: 98-99
2000 – 2009
- 2008
- [j2]Umesh Gajanan Nawathe, Mahmudul Hassan, King C. Yen, Ashok Kumar, Aparna Ramachandran, David Greenhill:
Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip. IEEE J. Solid State Circuits 43(1): 6-20 (2008) - 2007
- [c1]Umesh Gajanan Nawathe, Mahmudul Hassan, Lynn Warriner, King C. Yen, Bharat Upputuri, David Greenhill, Ashok Kumar, Heechoul Park:
An 8-Core 64-Thread 64b Power-Efficient SPARC SoC. ISSCC 2007: 108-590
1990 – 1999
- 1995
- [j1]Lavi Lev, Andy Charnas, Marc Tremblay, Alexander Dalal, Bruce A. Frederick, Chakra R. Srivatsa, David Greenhill, Dennis L. Wendell, Duy Dinh Pham, Eric Anderson, Hemraj K. Hingarh, Inayat Razzack, James M. Kaku, Ken Shin, Marc E. Levitt, Michael Allen, Philip A. Ferolito, Richard L. Bartolotti, Robert K. Yu, Ronald J. Melanson, Shailesh I. Shah, Sophie Nguyen, Sundari S. Mitra, Vinita Reddy, Vidyasagar Ganesan, Willem J. de Lange:
A 64-b microprocessor with multimedia support. IEEE J. Solid State Circuits 30(11): 1227-1238 (1995)
Coauthor Index
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