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Journal Articles
- 2021
[j1]Ravi R. Iyer
, Vivek De, Ramesh Illikkal, David A. Koufaty, Bhushan Chitlur, Andrew Herdrich, Muhammad M. Khellah, Fatih Hamzaoglu, Eric Karl:
Advances in Microprocessor Cache Architectures Over the Last 25 Years. IEEE Micro 41(6): 78-88 (2021)
Conference and Workshop Papers
- 2024
- [c7]Nikita Lazarev, Varun Gohil, James Tsai, Andy Anderson, Bhushan Chitlur, Zhiru Zhang, Christina Delimitrou:
Sabre: Hardware-Accelerated Snapshot Compression for Serverless MicroVMs. OSDI 2024: 1-18 - 2012
- [c6]Nagabhushan Chitlur, Ganapati Srinivasa, Scott Hahn, P. K. Gupta, Dheeraj Reddy, David A. Koufaty, Paul Brett, Abirami Prabhakaran, Li Zhao, Nelson Ijih, Suchit Subhaschandra, Sabina Grover, Xiaowei Jiang, Ravi R. Iyer:
QuickIA: Exploring heterogeneous architectures on real prototypes. HPCA 2012: 433-440 - 2011
- [c5]Neal Oliver, Rahul R. Sharma, Stephen Chang, Bhushan Chitlur, Elkin Garcia, Joseph Grecco, Aaron Grier, Nelson Ijih, Yaping Liu, Pratik Marolia, Henry Mitchel, Suchit Subhaschandra, Arthur Sheiman, Tim Whisonant, Prabhat Gupta:
A Reconfigurable Computing System Based on a Cache-Coherent Fabric. ReConFig 2011: 80-85 - 2010
- [c4]Qigang Wang, Rolf Kassa, Wenbo Shen, Nelson Ijih, Bhushan Chitlur, Michael Konow, Dong Liu, Arthur Sheiman, Prabhat Gupta:
An FPGA Based Hybrid Processor Emulation Platform. FPL 2010: 25-30 - 2009
- [c3]Liu Ling, Neal Oliver, Bhushan Chitlur, Qigang Wang, Alvin Chen, Wenbo Shen, Zhihong Yu, Arthur Sheiman, Ian McCallum, Joseph Grecco, Henry Mitchel, Dong Liu, Prabhat Gupta:
High-performance, energy-efficient platforms using in-socket FPGA accelerators. FPGA 2009: 261-264 - 2007
- [c2]Michael S. Schlansker, Nagabhushan Chitlur, Erwin Oertli, Paul M. Stillwell Jr., Linda Rankin, Dennis Bradford, Richard J. Carter, Jayaram Mudigonda, Nathan L. Binkert, Norman P. Jouppi:
High-performance ethernet-based communications for future multi-core processors. SC 2007: 37 - 1996
- [c1]Chitlur Nagabhushan, Olga Kosheleva, Sergio D. Cabrera, Glenn A. Gibson:
Design of Radix-2 and Radix-4 FFT Processors Using a Modular Architecture Family. PDPTA 1996: 589-599
Coauthor Index
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