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Shuangqu Huang
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2010 – 2019
- 2012
- [j3]Shuangqu Huang, Xiaoyang Zeng, Yun Chen:
A Flexible LDPC Decoder Architecture Supporting TPMP and TDMP Decoding Algorithms. IEICE Trans. Inf. Syst. 95-D(2): 403-412 (2012) - [j2]Changsheng Zhou, Yuebin Huang, Shuangqu Huang, Yun Chen, Xiaoyang Zeng:
An Area-Efficient Reconfigurable LDPC Decoder with Conflict Resolution. IEICE Trans. Electron. 95-C(4): 478-486 (2012) - 2011
- [j1]Bo Xiang, Dan Bao, Shuangqu Huang, Xiaoyang Zeng:
An 847-955 Mb/s 342-397 mW Dual-Path Fully-Overlapped QC-LDPC Decoder for WiMAX System in 0.13 μ m CMOS. IEEE J. Solid State Circuits 46(6): 1416-1432 (2011) - [c3]Yun Chen, Changsheng Zhou, Yuebin Huang, Shuangqu Huang, Xiaoyang Zeng:
Flexible and efficient FEC decoders supporting multiple transmission standards. ISOCC 2011: 48-53 - 2010
- [c2]Bo Xiang, Dan Bao, Shuangqu Huang, Xiaoyang Zeng:
A fully-overlapped multi-mode QC-LDPC decoder architecture for mobile WiMAX applications. ASAP 2010: 225-232 - [c1]Shuangqu Huang, Dan Bao, Bo Xiang, Yun Chen, Xiaoyang Zeng:
A flexible LDPC decoder architecture supporting two decoding algorithms. ISCAS 2010: 3929-3932
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