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Yoshiyuki Kawakami
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2010 – 2019
- 2012
- [j3]Megumi Ikemori-Kawada, Atsushi Inoue, Masaki Goto, Yuan John Wang, Yoshiyuki Kawakami:
Docking Simulation Study and Kinase Selectivity of f152A1 and Its Analogs. J. Chem. Inf. Model. 52(8): 2059-2068 (2012)
2000 – 2009
- 2009
- [j2]Megumi Ikemori-Kawada, Takatoshi Kawai, Masaki Goto, Yuan John Wang, Yoshiyuki Kawakami:
Conformational Analyses and MO Studies of f152A1 and Its Analogues as Potent Protein Kinase Inhibitors. J. Chem. Inf. Model. 49(12): 2650-2659 (2009) - 2008
- [j1]Yoshiyuki Kawakami, Makoto Terao, Masahiro Fukui, Shuji Tsukiyama:
A Power Grid Optimization Algorithm by Observing Timing Error Risk by IR Drop. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3423-3430 (2008) - 2003
- [c3]Takashi Sato, Toshiki Kanamoto, Atsushi Kurokawa, Yoshiyuki Kawakami, Hiroki Oka, Tomoyasu Kitaura, Hiroyuki Kobayashi, Masanori Hashimoto:
Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF. ASP-DAC 2003: 149-155 - 2000
- [c2]Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezawa, Nobufusa Iwanishi, Lifeng Wu, Alvin I-Hsien Chen, Norio Koike, Ping Chen, Chune-Sin Yeh, Zhihong Liu:
Gate-level aged timing simulation methodology for hot-carrier reliability assurance. ASP-DAC 2000: 289-294 - [c1]Lifeng Wu, Jingkun Fang, Heting Yan, Ping Chen, Alvin I-Hsien Chen, Yoshifumi Okamoto, Chune-Sin Yeh, Zhihong Liu, Nobufusa Iwanishi, Norio Koike, Hirokazu Yonezawa, Yoshiyuki Kawakami:
GLACIER: A Hot Carrier Gate Level Circuit Characterization and Simulation System for VLSI Design. ISQED 2000: 73-80
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