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Joon-Seo Yim
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1990 – 1999
- 1999
- [c5]Joon-Seo Yim, Chong-Min Kyung:
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design. DAC 1999: 485-490 - [c4]Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung:
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs. DAC 1999: 766-771 - 1997
- [j1]Joon-Seo Yim, Chang-Jae Park, In-Cheol Park, Chong-Min Kyung:
Design Verification of Complex Microprocessors. J. Circuits Syst. Comput. 7(4): 301-318 (1997) - [c3]Joon-Seo Yim, Chang-Jae Park, Woo-Seung Yang, Hun-Seung Oh, Hee-Choul Lee, Hoon Choi, Tae-Hoon Kim, Seungjong Lee, Nara Won, Yung-Hei Lee, In-Cheol Park
, Chong-Min Kyung:
Verification methodology of compatible microprocessors. ASP-DAC 1997: 173-180 - [c2]Joon-Seo Yim, Hee-Choul Lee, Tae-Hoon Kim, Bong-Il Park, Chang-Jae Park, In-Cheol Park
, Chong-Min Kyung:
Single cycle access cache for the misaligned data and instruction prefetch. ASP-DAC 1997: 677-678 - [c1]Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon Choi, Woo-Seung Yang, Hun-Seung Oh, In-Cheol Park, Chong-Min Kyung:
A C-Based RTL Design Verification Methodology for Complex Microprocessor. DAC 1997: 83-88
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