BibTeX records: Jelio Todorov Yantchev

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@article{DBLP:journals/tvlsi/JosephsY96,
  author    = {Mark B. Josephs and
               Jelio Todorov Yantchev},
  title     = {{CMOS} design of the tree arbiter element},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {4},
  number    = {4},
  pages     = {472--476},
  year      = {1996},
  url       = {https://doi.org/10.1109/92.544412},
  doi       = {10.1109/92.544412},
  timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/JosephsY96.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/YantchevHJN95,
  author    = {Jelio Todorov Yantchev and
               C. G. Huang and
               Mark B. Josephs and
               Ivailo M. Nedelchev},
  title     = {Low-latency asynchronous {FIFO} buffers},
  booktitle = {Second Working Conference on Asynchronous Design Methodologies, May
               30-31, 1995, London, England, {UK}},
  pages     = {24--31},
  publisher = {{IEEE} Computer Society},
  year      = {1995},
  url       = {https://doi.org/10.1109/WCADM.1995.514639},
  doi       = {10.1109/WCADM.1995.514639},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/async/YantchevHJN95.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Yantchev92,
  author    = {Jelio Todorov Yantchev},
  title     = {Communications in concurrent systems - programming language primitives
               and interconnection networks},
  school    = {University of Southampton, {UK}},
  year      = {1992},
  url       = {http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.316475},
  timestamp = {Thu, 06 Oct 2016 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/phd/ethos/Yantchev92.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/JosephsMUVY92,
  author    = {Mark B. Josephs and
               Rudolf H. Mak and
               Jan Tijmen Udding and
               Tom Verhoeff and
               Jelio Todorov Yantchev},
  editor    = {J{\o}rgen Staunstrup and
               Robin Sharp},
  title     = {High-Level Design of an Asynchronous Packet-Routing Chip},
  booktitle = {Designing Correct Circuits, Proceedings of the Second {IFIP} {WG10.2/WG10.5}
               Workshop on Designing Correct Circuits, Lyngby, Denmark, 6-8 January
               1992},
  series    = {{IFIP} Transactions},
  volume    = {{A-5}},
  pages     = {261--274},
  publisher = {North-Holland},
  year      = {1992},
  timestamp = {Thu, 06 Oct 2016 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/ifip10-2/JosephsMUVY92.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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