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Tat-Kwan Yu

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1990 – 1999

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1991
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Tat-Kwan Yu, Sung-Mo Kang, Jerome Sacks, William J. Welch:
Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models. Int. J. Circuit Theory Appl. 19(6): 579-592 (1991)

1980 – 1989

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1989
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Tat-Kwan Yu:
Statistical design of MOS VLSI circuits with designed experiments. University of Illinois Urbana-Champaign, USA, 1989
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Tat-Kwan Yu, Sung-Mo Kang, Jerome Sacks, William J. Welch:
An efficient method for parametric yield optimization of MOS integrated circuits. ICCAD 1989: 190-193
1988
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Tat-Kwan Yu, Sung-Mo Kang, Ibrahim N. Hajj, Timothy N. Trick:
iEDISON: an interactive statistical design tool for MOS VLSI circuits. ICCAD 1988: 20-23
1987
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Tat-Kwan Yu, Sung-Mo Kang, I. N. Haji, Timothy N. Trick:
Statistical Performance Modeling and Parametric Yield Estimation of MOS VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(6): 1013-1022 (1987)

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