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Ilya Wagner
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2010 – 2019
- 2015
- [j3]Biruk W. Mammo, Valeria Bertacco, Andrew DeOrio, Ilya Wagner:
Post-Silicon Validation of Multiprocessor Memory Consistency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 1027-1037 (2015) - 2011
- [c12]Ilya Wagner, Shih-Lien Lu:
Distributed hardware matcher framework for SoC survivability. DATE 2011: 305-310 - [c11]Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu:
Energy-efficient cache design using variable-strength error-correcting codes. ISCA 2011: 461-472
2000 – 2009
- 2009
- [c10]Ilya Wagner, Valeria Bertacco:
Caspar: Hardware patching for multicore processors. DATE 2009: 658-663 - [c9]Andrew DeOrio, Ilya Wagner, Valeria Bertacco:
Dacota: Post-silicon validation of the memory subsystem in multi-core designs. HPCA 2009: 405-416 - 2008
- [b1]Ilya Wagner:
An Effective Verification Solution for Modern Microprocessors. University of Michigan, USA, 2008 - [j2]Ilya Wagner, Valeria Bertacco, Todd M. Austin:
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 380-393 (2008) - [c8]Ilya Wagner, Valeria Bertacco:
MCjammer: Adaptive Verification for Multi-core Designs. DATE 2008: 670-675 - [c7]Ilya Wagner, Valeria Bertacco:
Reversi: Post-silicon validation system for modern microprocessors. ICCD 2008: 307-314 - [c6]Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie:
Testudo: Heavyweight security analysis via statistical sampling. MICRO 2008: 117-128 - 2007
- [j1]Ilya Wagner, Valeria Bertacco, Todd M. Austin:
Microprocessor Verification via Feedback-Adjusted Markov Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6): 1126-1138 (2007) - [c5]Ilya Wagner, Valeria Bertacco:
Engineering trust with semantic guardians. DATE 2007: 743-748 - [c4]Kai-Hui Chang, Ilya Wagner, Valeria Bertacco, Igor L. Markov:
Automatic error diagnosis and correction for RTL designs. HLDVT 2007: 65-72 - 2006
- [c3]Ilya Wagner, Valeria Bertacco, Todd M. Austin:
Depth-driven verification of simultaneous interfaces. ASP-DAC 2006: 442-447 - [c2]Ilya Wagner, Valeria Bertacco, Todd M. Austin:
Shielding against design flaws with field repairable control logic. DAC 2006: 344-347 - 2005
- [c1]Ilya Wagner, Valeria Bertacco, Todd M. Austin:
StressTest: an automatic approach to test generation via activity monitors. DAC 2005: 783-788
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