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Holger Ruckdeschel
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Journal Articles
- 2007
- [j1]Hritam Dutta, Frank Hannig, Holger Ruckdeschel, Jürgen Teich:
Efficient control generation for mapping nested loop programs onto processor arrays. J. Syst. Archit. 53(5-6): 300-309 (2007)
Conference and Workshop Papers
- 2008
- [c4]Frank Hannig, Holger Ruckdeschel, Hritam Dutta, Jürgen Teich:
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications. ARC 2008: 284-289 - [c3]Frank Hannig, Holger Ruckdeschel, Jürgen Teich:
The PAULA Language for Designing Multi-Dimensional Dataflow-Intensive Applications. MBMV 2008: 129-138 - 2007
- [c2]Jürgen Teich, Frank Hannig, Holger Ruckdeschel, Hritam Dutta, Dmitrij Kissler, Andrej Stravet:
A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation. ERSA 2007: 14-24 - 2005
- [c1]Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich:
Automatic FIR Filter Generation for FPGAs. SAMOS 2005: 51-61
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