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Hidetomo Shibamura
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Journal Articles
- 2011
- [j3]Hideki Miwa, Ryutaro Susukita, Hidetomo Shibamura, Tomoya Hirao, Jun Maki, Makoto Yoshida, Takayuki Kando, Yuichiro Ajima, Ikuo Miyoshi, Toshiyuki Shimizu, Yuji Oinaga, Hisashige Ando, Yuichi Inadomi, Koji Inoue, Mutsumi Aoyagi, Kazuaki J. Murakami:
NSIM: An Interconnection Network Simulator for Extreme-Scale Parallel Computers. IEICE Trans. Inf. Syst. 94-D(12): 2298-2308 (2011) - 2002
- [j2]Toshinori Sueyoshi, Morihiro Kuga, Hidetomo Shibamura:
KITE microprocessor and CAE for computer science. Syst. Comput. Jpn. 33(8): 64-74 (2002) - 1996
- [j1]Yulu Yang, Hideharu Amano, Hidetomo Shibamura, Toshinori Sueyoshi:
Recursive Diagonal Torus (RDT): An Interconnection Network for the Massively Parallel Computers. Syst. Comput. Jpn. 27(9): 43-54 (1996)
Conference and Workshop Papers
- 2022
- [c7]Yuan Wang, Hidetomo Shibamura, KuanYi Ng, Koji Inoue:
Implementation of Edge-cloud Cooperative CNN Inference on an IoT Platform. MCSoC 2022: 337-344 - 2016
- [c6]Yoshiyuki Morie
, Hiroaki Honda, Takeshi Nanri, Taizo Kobayashi, Hidetomo Shibamura, Ryutaro Susukita, Yuichiro Ajima:
Memory Efficient One-Sided Communucation Library "ACP" in Globary Memory on Raspberry Pi 2. ICDCS 2016: 761-762 - [c5]Ryutaro Susukita, Yoshiyuki Morie
, Takeshi Nanri, Hidetomo Shibamura:
NSIM-ACE: An Interconnection Network Simulator for Evaluating Remote Direct Memory Access. SIMULTECH 2016: 254-261 - 2015
- [c4]Hidetomo Shibamura:
Active Packet Pacing as a Congestion Avoidance Technique in Interconnection Network. PARCO 2015: 257-264 - 2008
- [c3]Ryutaro Susukita, Hisashige Ando, Mutsumi Aoyagi, Hiroaki Honda, Yuichi Inadomi, Koji Inoue, Shigeru Ishizuki, Yasunori Kimura, Hidemi Komatsu, Motoyoshi Kurokawa
, Kazuaki J. Murakami, Hidetomo Shibamura, Shuji Yamamura, Yunqing Yu:
Performance prediction of large-scale parallell system and application using macro-level simulation. SC 2008: 20 - 2004
- [c2]Hidetomo Shibamura, Masayuki Fukuyama, Daisuke Uchida, Seiji Ikeda, Morihiro Kuga, Toshinori Sueyoshi:
EXPRESS-1: a dynamically reconfigurable platform using embedded processor FPGA. FPT 2004: 209-216 - 1993
- [c1]Yulu Yang, Hideharu Amano, Hidetomo Shibamura, Toshinori Sueyoshi:
Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers. SPDP 1993: 591-595
Coauthor Index
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