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ORCIDYongqiang Zhang 0006
Person information
- affiliation: Hefei University of Technology, School of Electronic Science and AppliedPhysics, China
Other persons with the same name
- Yongqiang Zhang — disambiguation page
- Yongqiang Zhang 0001 — Hebei University of Science and Technology, School of Information Science and Engineering, China
- Yongqiang Zhang 0002 — Leibniz-Centre for Agricultural Landscape Research, Müncheberg, Germany
- Yongqiang Zhang 0003
![[0000-0001-5809-4829]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0001-5809-4829")
— NetEase Fuxi AI Lab, Hangzhou, China (and 1 more) - Yongqiang Zhang 0004 — CSIRO Land and Water, Canberra, ACT, Australia (and 1 more)
- Yongqiang Zhang 0005 — King Abdullah University of Science and Technology, KAUST, Computer, Electrical, and Mathematical Sciences and Engineering Division, Saudi Arabia (and 1 more)
- Yongqiang Zhang 0007 — Harbin Institute of Technology, HIT, 1School of Instrument Science and Engineering, China (and 1 more)
- Yongqiang Zhang 0008 — Xi'an University of Science and Technology, School of Mechanical Engineering, Shaanxi Key Laboratory of Mine Electromechanical Equipment Intelligent Monitoring, China
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Journal Articles
- 2024
[j35]Shaowei Wang, Guangjun Xie, Wenbing Xu, Yongqiang Zhang, Jie Han:
A Low-Cost and Fault-Tolerant Stochastic Architecture for the Bernsen Algorithm Using Bitstream Correlation. J. Circuits Syst. Comput. 33(9) (2024)- [j34]Shangnan Dai, Guangjun Xie, Hui Zhang, Feifei Deng, Yongqiang Zhang:
Implementations of efficient non-blocking crossbar network with novel multiplexer design in quantum-dot cellular automata. Nano Commun. Networks 40: 100509 (2024) - [j33]Yongqiang Zhang, Xiaoyue Chen, Jie Han, Guangjun Xie:
Stochastic Mean Circuits Based on Inner-Product Units Using Correlated Bitstreams. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 867-871 (2024) - [j32]Yongqiang Zhang, Jiao Qin, Jie Han, Guangjun Xie:
Design of a Stochastic Computing Architecture for the Phansalkar Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 442-454 (2024) - 2023
- [j31]Xin Cheng, Yixuan Xu, Kefan Wang, Yongqiang Zhang, Bin Li, Zhang Zhang:
Lightweight and flexible hardware implementation of authenticated encryption algorithm SIMON-Galois/Counter Mode. Int. J. Circuit Theory Appl. 51(12): 5951-5961 (2023) - [j30]Yongqiang Zhang, Lingyun Xie, Jie Han, Xin Cheng, Guangjun Xie:
Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 771-775 (2023) - [j29]Yongqiang Zhang, Siting Liu, Jie Han, Zhendong Lin, Shaowei Wang, Xin Cheng, Guangjun Xie:
An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1439-1443 (2023) - 2022
- [j28]Feifei Deng, Guangjun Xie, Yongqiang Zhang, Song Chen:
Module-based design method using clocking scheme for quantum-dot cellular automata. Int. J. Circuit Theory Appl. 50(2): 448-464 (2022) - [j27]Shaowei Wang, Guangjun Xie, Jie Han, Yongqiang Zhang:
Highly accurate division and square root circuits by exploiting signal correlation in stochastic computing. Int. J. Circuit Theory Appl. 50(4): 1375-1385 (2022) - [j26]Wenbing Xu, Guangjun Xie, Shaowei Wang, Zhendong Lin, Jie Han, Yongqiang Zhang:
A stochastic computing architecture for local contrast and mean image thresholding algorithm. Int. J. Circuit Theory Appl. 50(9): 3279-3291 (2022) - [j25]Shaowei Wang, Guangjun Xie, Wenbing Xu, Xin Cheng, Yongqiang Zhang:
High-accuracy mean circuits design by manipulating correlation for stochastic computing. Int. J. Circuit Theory Appl. 50(10): 3692-3703 (2022) - [j24]Yongqiang Zhang, Xiaoyue Chen, Cong He, Guangjun Xie:
Energy-efficient multipliers using imprecise compressors for image multiplication. Int. J. Circuit Theory Appl. 50(11): 3875-3890 (2022) - [j23]Feifei Deng, Guangjun Xie, Xin Cheng, Yongqiang Zhang:
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata. Microelectron. J. 128: 105544 (2022) - [j22]Yongqiang Zhang, Chunsong Zhu, Xin Cheng, Guangjun Xie:
Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3909-3913 (2022) - [j21]Shaowei Wang, Guangjun Xie, Xin Cheng, Yongqiang Zhang:
Weighted-Adder-Based Polynomial Computation Using Correlated Unipolar Stochastic Bitstreams. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4528-4532 (2022) - [j20]Yizhong Yang, Jiahao Ruan, Yongqiang Zhang, Xin Cheng, Zhang Zhang, Guangjun Xie:
STPNet: A Spatial-Temporal Propagation Network for Background Subtraction. IEEE Trans. Circuits Syst. Video Technol. 32(4): 2145-2157 (2022) - [j19]Yizhong Yang, Zhihang Cheng, Haotian Yu, Yongqiang Zhang, Xin Cheng, Zhang Zhang, Guangjun Xie:
MSE-Net: generative image inpainting with multi-scale encoder. Vis. Comput. 38(8): 2647-2659 (2022) - 2021
- [j18]Xin Cheng, Bin Li, Haowen Zhu, Yongqiang Zhang, Zhang Zhang:
A high-resolution hybrid digital pulse width modulator with dual-edge-triggered flip-flops and hardware compensation. Int. J. Circuit Theory Appl. 49(1): 159-168 (2021) - [j17]Chunsong Zhu, Guangjun Xie, Yongqiang Zhang:
Design and implementation of programmable logic array using crossbar structure in quantum-dot cellular automata. Int. J. Circuit Theory Appl. 49(11): 3669-3682 (2021) - [j16]Jianhong Huang, Guangjun Xie, Rui Kuang, Feifei Deng, Yongqiang Zhang:
QCA-based Hamming code circuit for nano communication network. Microprocess. Microsystems 84: 104237 (2021) - [j15]Xin Cheng, Haowen Zhu, Yixuan Xu, Yongqiang Zhang, Hao Xiao, Zhang Zhang:
A reconfigurable and compact hardware architecture of CLEFIA block cipher with multi-configuration. Microelectron. J. 114: 105144 (2021) - [j14]Fei Peng, Yongqiang Zhang, Rui Kuang, Guangjun Xie:
Spars: A Full Flow Quantum-Dot Cellular Automata Circuit Design Tool. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1233-1237 (2021) - [j13]Zhendong Lin, Guangjun Xie, Wenbing Xu, Jie Han, Yongqiang Zhang:
Accelerating Stochastic Computing Using Deterministic Halton Sequences. IEEE Trans. Circuits Syst. II Express Briefs 68(10): 3351-3355 (2021) - 2020
- [j12]Xin Cheng, Wanjing Shao, Yongqiang Zhang, Jianmin Zeng, Zhang Zhang:
High frequency and high efficiency DC-DC converter with sensorless adaptive-sizing technique. IEICE Electron. Express 17(3): 20190719 (2020) - [j11]Feifei Deng, Guangjun Xie, Xin Cheng, Zhang Zhang, Yongqiang Zhang:
CFE: a convenient, flexible, and efficient clocking scheme for quantum-dot cellular automata. IET Circuits Devices Syst. 14(1): 88-92 (2020) - [j10]Feifei Deng, Guangjun Xie, Shaowei Wang, Xin Cheng, Yongqiang Zhang:
An Ultra-Low-Power Five-Input Majority Gate in Quantum-Dot Cellular Automata. J. Circuits Syst. Comput. 29(11): 2050176:1-2050176:19 (2020) - [j9]Yongqiang Zhang, Guangjun Xie, Jie Han:
A robust wire crossing design for thermostability and fault tolerance in quantum-dot cellular automata. Microprocess. Microsystems 74: 103033 (2020) - [j8]Xin Cheng, Wanjing Shao, Lixin Xu, Yongqiang Zhang, Guangjun Xie, Zhang Zhang:
A High Resolution DPWM Based on Synchronous Phase-Shifted Circuit and Delay Line. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(8): 2685-2692 (2020) - [j7]Zhixin Song, Guangjun Xie, Xin Cheng, Lei Wang, Yongqiang Zhang:
An Ultra-Low Cost Multilayer RAM in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. 67-II(12): 3397-3401 (2020) - [j6]Feifei Deng, Guangjun Xie, Renjun Zhu, Yongqiang Zhang:
A matrix representation method for decoders using majority gate characteristics in quantum-dot cellular automata. J. Supercomput. 76(4): 2842-2859 (2020) - 2019
- [j5]Yongqiang Zhang, Guangjun Xie, Jie Han:
Serial concatenated convolutional code encoder in quantum-dot cellular automata. Nano Commun. Networks 22 (2019) - 2018
- [j4]Mengbo Sun, Hongjun Lv, Yongqiang Zhang, Guangjun Xie:
The Fundamental Primitives with Fault-Tolerance in Quantum-Dot Cellular Automata. J. Electron. Test. 34(2): 109-122 (2018) - 2017
- [j3]Fengbin Deng, Guangjun Xie, Yongqiang Zhang, Fei Peng, Hongjun Lv:
A novel design and analysis of comparator with XNOR gate for QCA. Microprocess. Microsystems 55: 131-135 (2017) - 2016
- [j2]Yongqiang Zhang, Hongjun Lv, Huakun Du, Cheng Huang, Shuai Liu, Guangjun Xie:
Modular design of QCA carry flow adders and multiplier with reduced wire crossing and number of logic gates. Int. J. Circuit Theory Appl. 44(7): 1351-1366 (2016) - 2014
- [j1]Guangjun Xie, Yunlong Xiang, Yongqiang Zhang, Shuai Liu, Hongjun Lv:
Design and Implementation of Encoding and Check Code Circuit with Hamming Code on QCA. Int. J. Unconv. Comput. 10(5-6): 391-404 (2014)
Conference and Workshop Papers
- 2021
- [c4]Xin Cheng, Haowen Zhu, Xinyi Xing, Yunfeng Zhang, Yongqiang Zhang, Guangjun Xie, Zhang Zhang:
A Feedback Architecture of High Speed True Random Number Generator based on Ring Oscillator. A-SSCC 2021: 1-3 - [c3]Zhendong Lin, Guangjun Xie, Shaowei Wang, Jie Han, Yongqiang Zhang:
A Review of Deterministic Approaches to Stochastic Computing. NANOARCH 2021: 1-6 - [c2]Yuancheng Zhou, Guangjun Xie, Jie Han, Yongqiang Zhang:
Absolute Subtraction and Division Circuits Using Uncorrelated Random Bitstreams in Stochastic Computing. NANOARCH 2021: 1-6 - 2019
- [c1]Xin Cheng, Bo Cheng, Zechen Tang, Yongqiang Zhang, Zhang Zhang:
A Single-Input Multi-Output Piezoelectric Energy Harvesting System Combining with P-SSHI and Cold Startup Circuit. APCCAS 2019: 65-68
Coauthor Index
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