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ORCIDRan Liu 0003
Person information
- affiliation: Fudan University, Software School, Shanghai, China
- affiliation: Shanghai Jiao Tong University, Institute of Parallel and Distributed Systems, China
Other persons with the same name
- Ran Liu — disambiguation page
- Ran Liu 0001 — Fudan University, State Key Laboratory of ASIC and System, Department of Microelectronics, Shanghai, China
- Ran Liu 0002 — Beijing Normal University, State Key Laboratoy of Remote Sensing Science, China
- Ran Liu 0004 — Huazhong University of Science & Technology
- Ran Liu 0005
![[0000-0002-7922-8969]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-7922-8969")
— Shanghai Jiao Tong University, Department of Industrial Engineering and Logistics Management, China (and 2 more) - Ran Liu 0006 — Chongqing University, College of Computer Science, China
- Ran Liu 0007 — Singapore University of Technology and Design, MIT International Design Center, Singapore (and 1 more)
- Ran Liu 0008 — Carnegie Mellon University, Human-Computer Interaction Institute, Pittsburgh, PA, USA
- Ran Liu 0009 — Sun Yat-Sen University, Guangdong Provincial Key Laboratory of Urbanization and Geo-simulation, Guangzhou, China
- Ran Liu 0010 — Northeastern University, Department of Electrical and Computer Engineering, Boston, MA, USA
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Journal Articles
- 2016
[j2]Haibo Chen, Heng Zhang, Ran Liu, Binyu Zang, Haibing Guan:
Fast Consensus Using Bounded Staleness for Scalable Read-Mostly Synchronization. IEEE Trans. Parallel Distributed Syst. 27(12): 3485-3500 (2016)- 2015
- [j1]Zhaoguo Wang, Han Yi, Ran Liu, Mingkai Dong, Haibo Chen:
Persistent Transactional Memory. IEEE Comput. Archit. Lett. 14(1): 58-61 (2015)
Conference and Workshop Papers
- 2014
- [c4]Ran Liu, Heng Zhang, Haibo Chen:
Scalable Read-mostly Synchronization Using Passive Reader-Writer Locks. USENIX ATC 2014: 219-230 - 2013
- [c3]Xiang Song, Jicheng Shi, Ran Liu, Jian Yang, Haibo Chen:
Parallelizing live migration of virtual machines. VEE 2013: 85-96 - 2012
- [c2]Ran Liu, Haibo Chen:
SSMalloc: a low-latency, locality-conscious memory allocator with stable performance scalability. APSys 2012: 15 - 2011
- [c1]Zhaoguo Wang, Ran Liu, Yufei Chen, Xi Wu, Haibo Chen, Weihua Zhang, Binyu Zang:
COREMU: a scalable and portable parallel full-system emulator. PPoPP 2011: 213-222
Coauthor Index
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