default search action

combined dblp search
author search
venue search
publication search

ask others

C. K. Pithawa

> Home > Persons

Person information

Refine list

refinements active!

zoomed in on ?? of ?? records

view refined list in

export refined list as

showing all ?? records

2010 – 2019

see FAQ

What is the meaning of the colors in the publication lists?

2011
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/isvlsi/SukhwaniCTPS11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isvlsi/SukhwaniCTPS11
Menka Sukhwani, Vinay Bhaskar Chandratre, Megha Thomas, C. K. Pithawa, Vangmayee Sharda:
500 MHz Delay Locked Loop Based 128-bin, 256 ns Deep Analog Memory ASIC "Anusmriti". ISVLSI 2011: 72-77
[c1]
- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/KumarCMP11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/KumarCMP11
Shiv Kumar, Vinay Bhaskar Chandratre, Sudheer K. Mohammed, C. K. Pithawa:
Extraction of Aspect Ratio for Non-Manhattan CMOS Devices. VLSI Design 2011: 130-134

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.