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2020 – today
- 2024
[j11]Quan Deng, Qiang Liu, Ming Yuan, Xiaohui Duan, Lin Gan, Jinzhe Yang, Wenlai Zhao, Zhenxiang Zhang, Guiming Wu, Wayne Luk, Haohuan Fu, Guangwen Yang:
Acceleration of Multi-Body Molecular Dynamics With Customized Parallel Dataflow. IEEE Trans. Parallel Distributed Syst. 35(12): 2297-2314 (2024)- [i1]Pengcheng Qiu, Guiming Wu, Tingqiang Chu, Changzheng Wei, Runzhou Luo, Ying Yan, Wei Wang, Hui Zhang:
MSMAC: Accelerating Multi-Scalar Multiplication for Zero-Knowledge Proof. IACR Cryptol. ePrint Arch. 2024: 1246 (2024) - 2023
- [j10]Guiming Wu
, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yunfeng Shi, Xin Long, Linquan Jiang, Shuangchen Li, Yuan Xie, Changzheng Wei, Yuan Zhao, Ying Yan, Hui Zhang, Yinchao Zou:
E-Booster: A Field-Programmable Gate Array-Based Accelerator for Secure Tree Boosting Using Additively Homomorphic Encryption. IEEE Micro 43(5): 88-96 (2023) - [j9]Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yuan Zhao, Yinchao Zou, Jie Zhang, Changzheng Wei, Ying Yan, Hui Zhang:
Topgun: An ECC Accelerator for Private Set Intersection. ACM Trans. Reconfigurable Technol. Syst. 16(4): 52:1-52:30 (2023) - 2022
- [c13]Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Xin Long, Yuan Zhao, Yinchao Zou:
A High-Performance Hardware Architecture for ECC Point Multiplication over Curve25519. FCCM 2022: 1-9
2010 – 2019
- 2019
- [j8]Xun Jia, Lei Qian, Guiming Wu, Dong Wu, Xianghui Xie:
FPGA应用于高性能计算的研究现状和未来挑战 (Research Advances and Future Challenges of FPGA-based High Performance Computing). 计算机科学 46(11): 11-19 (2019) - 2017
- [c12]Xun Jia, Guiming Wu, Xianghui Xie:
A High-Performance Accelerator for Floating-Point Matrix Multiplication. ISPA/IUCC 2017: 396-402 - 2015
- [j7]Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu:
A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme. IEICE Electron. Express 12(11): 20150161 (2015) - [j6]Guiming Wu, Fang Zheng, Xianghui Xie, Dong Wu, Xinkai Yan:
GF(2m)上椭圆曲线标量乘的硬件结构实现 (Hardware Implementation of Scalar Multiplication on Elliptic Curves over GF(2m)). 计算机科学 42(1): 79-81 (2015) - [j5]Guiming Wu, Miao Wang, Xianghui Xie, Yong Dou, Song Guo:
面向定制结构的稀疏矩阵分块方法 (Sparse Matrix Blocking Method for Custom Architecture). 计算机科学 42(11): 63-64 (2015) - 2013
- [j4]Guiming Wu, Xianghui Xie, Yong Dou, Miao Wang:
High-Performance Architecture for the Conjugate Gradient Solver on FPGAs. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 791-795 (2013) - 2012
- [j3]Guiming Wu, Yong Dou, Junqing Sun, Gregory D. Peterson:
A High Performance and Memory Efficient LU Decomposer on FPGAs. IEEE Trans. Computers 61(3): 366-378 (2012) - [c11]Guiming Wu, Xianghui Xie, Yong Dou, Junqing Sun, Dong Wu, Yuan Li:
Parallelizing sparse LU decomposition on FPGAs. FPT 2012: 352-359 - 2010
- [j2]Yong Dou, Jie Zhou, Guiming Wu, Jingfei Jiang, Yuanwu Lei, Shi-Ce Ni:
A Unified Co-Processor Architecture for Matrix Decomposition. J. Comput. Sci. Technol. 25(4): 874-885 (2010) - [c10]Guiming Wu, Yong Dou, Gregory D. Peterson:
Blocking LU Decomposition for FPGAs. FCCM 2010: 109-112 - [c9]Guiming Wu, Yong Dou, Miao Wang:
High performance and memory efficient implementation of matrix multiplication on FPGAs. FPT 2010: 134-137 - [c8]Guiming Wu, Yong Dou, Miao Wang:
Automatic synthesis of processor arrays with local memories on FPGAs. FPT 2010: 249-252 - [c7]Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen:
FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing. ICS 2010: 325-336
2000 – 2009
- 2009
- [j1]Yong Dou, Guiming Wu, Jinhui Xu, Xingming Zhou:
A coarse-grained reconfigurable computing architecture with loop self-pipelining. Sci. China Ser. F Inf. Sci. 52(4): 575-587 (2009) - [c6]Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou, Miao Wang, Jingfei Jiang:
A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs. FCCM 2009: 183-190 - [c5]Guiming Wu, Miao Wang, Yong Dou, Fei Xia:
Exploiting Fine-Grained Pipeline Parallelism for Wavefront Computations on Multicore Platforms. ICPP Workshops 2009: 402-408 - 2008
- [c4]Guiming Wu, Jinhui Xu, Yong Dou, Miao Wang:
Computation rotating for data reuse. ACSAC 2008: 1-7 - 2007
- [c3]Yong Dou, Jinhui Xu, Guiming Wu:
The Implementation of a Coarse-Grained Reconfigurable Architecture with Loop Self-pipelining. ARC 2007: 155-166 - [c2]Miao Wang, Guiming Wu, Zhiying Wang:
Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors. ISPA 2007: 946-957 - 2006
- [c1]Jinhui Xu, Guiming Wu, Yong Dou, Yazhuo Dong:
Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining. Asia-Pacific Computer Systems Architecture Conference 2006: 567-573
Coauthor Index
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