BibTeX records: Hsien-Te Chen

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@article{DBLP:journals/tcad/HsuCH14,
  author    = {Po{-}Yang Hsu and
               Hsien{-}Te Chen and
               TingTing Hwang},
  title     = {Stacking Signal {TSV} for Thermal Dissipation in Global Routing for
               3-D {IC}},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {33},
  number    = {7},
  pages     = {1031--1042},
  year      = {2014},
  url       = {https://doi.org/10.1109/TCAD.2014.2307488},
  doi       = {10.1109/TCAD.2014.2307488},
  timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcad/HsuCH14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HsuCH13,
  author    = {Po{-}Yang Hsu and
               Hsien{-}Te Chen and
               TingTing Hwang},
  title     = {Stacking signal {TSV} for thermal dissipation in global routing for
               3D {IC}},
  booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2013, Yokohama, Japan, January 22-25, 2013},
  pages     = {699--704},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {https://doi.org/10.1109/ASPDAC.2013.6509682},
  doi       = {10.1109/ASPDAC.2013.6509682},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/HsuCH13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChenLWH11,
  author    = {Hsien{-}Te Chen and
               Hong{-}Long Lin and
               Zi{-}Cheng Wang and
               TingTing Hwang},
  title     = {A new architecture for power network in 3D {IC}},
  booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
               March 14-18, 2011},
  pages     = {401--406},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {https://doi.org/10.1109/DATE.2011.5763070},
  doi       = {10.1109/DATE.2011.5763070},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/ChenLWH11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenCH10,
  author    = {Hsien{-}Te Chen and
               Chieh{-}Chun Chang and
               TingTing Hwang},
  title     = {Reconfigurable {ECO} Cells for Timing Closure and {IR} Drop Minimization},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {18},
  number    = {12},
  pages     = {1686--1695},
  year      = {2010},
  url       = {https://doi.org/10.1109/TVLSI.2009.2026478},
  doi       = {10.1109/TVLSI.2009.2026478},
  timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/ChenCH10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChenCH09,
  author    = {Hsien{-}Te Chen and
               Chieh{-}Chun Chang and
               TingTing Hwang},
  title     = {New spare cell design for {IR} drop minimization in Engineering Change
               Order},
  booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
               San Francisco, CA, USA, July 26-31, 2009},
  pages     = {402--407},
  publisher = {{ACM}},
  year      = {2009},
  url       = {https://doi.org/10.1145/1629911.1630017},
  doi       = {10.1145/1629911.1630017},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/ChenCH09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/SheuSYCWCL05,
  author    = {Yi{-}Ming Sheu and
               Ke{-}Wei Su and
               Sheng{-}Jier Yang and
               Hsien{-}Te Chen and
               Chih{-}Chiang Wang and
               Ming{-}Jer Chen and
               S. Liu},
  title     = {Modeling well edge proximity effect on highly-scaled MOSFETs},
  booktitle = {Proceedings of the {IEEE} 2005 Custom Integrated Circuits Conference,
               {CICC} 2005, DoubleTree Hotel, San Jose, California, USA, September
               18-21, 2005},
  pages     = {831--834},
  publisher = {{IEEE}},
  year      = {2005},
  url       = {https://doi.org/10.1109/CICC.2005.1568798},
  doi       = {10.1109/CICC.2005.1568798},
  timestamp = {Thu, 14 Jan 2021 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/cicc/SheuSYCWCL05.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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