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Toshiyuki Tsutsumi
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Journal Articles
- 2015
- [j4]Yasuhiro Ogasahara
, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike:
Impacts of flexible Vth control, low process variability, and steep SS with low on-current of new structure transistors to ultra-low voltage designs. IEICE Electron. Express 12(15): 20150460 (2015) - 2008
- [j3]Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa:
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations. ACM Trans. Reconfigurable Technol. Syst. 1(1): 3:1-3:31 (2008) - 2007
- [j2]Takashi Kawanami, Masakazu Hioki
, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA. IEICE Trans. Inf. Syst. 90-D(12): 1947-1955 (2007) - 2004
- [j1]Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity. IEICE Trans. Inf. Syst. 87-D(8): 2004-2010 (2004)
Conference and Workshop Papers
- 2023
- [c16]Luo Jiahui, Tomoyuki Morimoto, Tadahiro Ogita, Ryota Kawamata, Zi-Ming Wang, Toshiyuki Tsutsumi:
Microprocessor Instruction Design Tool for RISC-V Architecture. ISCIT 2023: 1-6 - 2022
- [c15]Tadahiro Ogita, Tomoyuki Morimoto, Shunsuke Onogi, Ryota Kawamata, Ziming Wang, Toshiyuki Tsutsumi:
Initial Implementation and Utilization of Instruction Dynamic Simulation in MEIMAT. ISCIT 2022: 154-159 - [c14]Tomoyuki Morimoto, Shunsuke Onogi, Tadahiro Ogita, Ryota Kawamata, Ziming Wang, Toshiyuki Tsutsumi:
Visualization Tool of Microprocessor Instruction for Designing New Architecture with Meta-Instructions. ISCIT 2022: 263-268 - 2019
- [c13]Tomoyuki Morimoto, Ryouhei Iwamoto, Toshiyuki Tsutsumi:
Early Development of Visualization Tool for Instruction Implement of Microprocessor. ISCIT 2019: 5-9 - 2013
- [c12]Koji Yamazaki, Toshiyuki Tsutsumi, Hiroshi Takahashi, Yoshinobu Higami, Hironobu Yotsuyanagi, Masaki Hashizume, Kewal K. Saluja:
Diagnosing Resistive Open Faults Using Small Delay Fault Simulation. Asian Test Symposium 2013: 79-84 - [c11]Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Hanpei Koike, Yohei Matsumoto, Takashi Kawanami, Toshiyuki Tsutsumi:
Fully-functional FPGA prototype with fine-grain programmable body biasing. FPGA 2013: 73-80 - 2009
- [c10]Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu, Koji Yamazaki, Toshiyuki Tsutsumi, Hiroyuki Yotsuyanagi, Masaki Hashizume:
New Class of Tests for Open Faults with Considering Adjacent Lines. Asian Test Symposium 2009: 301-306 - [c9]Koji Yamazaki, Toshiyuki Tsutsumi, Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Yuzo Takamatsu, Hiroyuki Yotsuyanagi, Masaki Hashizume:
A Novel Approach for Improving the Quality of Open Fault Diagnosis. VLSI Design 2009: 85-90 - [c8]Hiroyuki Yotsuyanagi, Masaki Hashizume, Toshiyuki Tsutsumi, Koji Yamazaki, Takashi Aikyo, Yoshinobu Higami, Hiroshi Takahashi, Yuzo Takamatsu:
Fault Effect of Open Faults Considering Adjacent Signal Lines in a 90 nm IC. VLSI Design 2009: 91-96 - 2007
- [c7]Hiroshi Takahashi, Yoshinobu Higami, Shuhei Kadoyama, Takashi Aikyo, Yuzo Takamatsu, Koji Yamazaki, Toshiyuki Tsutsumi, Hiroyuki Yotsuyanagi, Masaki Hashizume:
Clues for Modeling and Diagnosing Open Faults with Considering Adjacent Lines. ATS 2007: 39-44 - [c6]Yohei Matsumoto, Masakazu Hioki
, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Performance and yield enhancement of FPGAs with within-die variation using multiple configurations. FPGA 2007: 169-177 - [c5]Masakazu Hioki
, Takashi Kawanami, Yohei Matsumoto, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Toshiyuki Tsutsumi:
A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip. FPT 2007: 285-288 - 2006
- [c4]Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Evaluation of granularity on threshold voltage control in flex power FPGA. FPGA 2006: 223 - [c3]Masakazu Hioki
, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Evaluation of granularity on threshold voltage control in flex power FPGA. FPT 2006: 17-24 - [c2]Takashi Kawanami, Masakazu Hioki
, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Optimal set of body bias voltages for an FPGA with field-programmable Vth components. FPT 2006: 329-332 - 2004
- [c1]Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity. FPGA 2004: 257
Coauthor Index
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