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ORCIDJochen Verbrugghe
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2010 – 2019
- 2017
[c6]Bart Moeneclaey, Jochen Verbrugghe, Elad Mentovich, Paraskevas Bakopoulos, Johan Bauwelinck, Xin Yin:
A 64 Gb/s PAM-4 transimpedance amplifier for optical links. OFC 2017: 1-3- 2015
- [j3]Ramses Pierco, Guy Torfs, Jochen Verbrugghe, Benoit Bakeroot
, Johan Bauwelinck:
A 16 Channel High-Voltage Driver with 14 Bit Resolution for Driving Piezoelectric Actuators. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1726-1736 (2015) - [c5]Bart Moeneclaey, Giannis Kanakis, Jochen Verbrugghe, Nikos Iliadis, Wouter Soenen, Dimitrios Kalavrouziotis, Christos Spatharakis, Stefanos Dris, Xin Yin, Paraskevas Bakopoulos, Elad Mentovich, Hercules Avramopoulos, Johan Bauwelinck:
A 64 Gb/s PAM-4 linear optical receiver. OFC 2015: 1-3 - [c4]Xin Yin, Jochem Verbist, Timothy De Keulenaer, Bart Moeneclaey, Jochen Verbrugghe, Xing-Zhi Qiu, Johan Bauwelinck:
25Gb/s 3-level burst-mode receiver for high serial rate TDM-PONs. OFC 2015: 1-3 - 2014
- [j2]Renato Vaernewyck, Xin Yin, Jochen Verbrugghe, Guy Torfs, Xing-Zhi Qiu, Efstratios Kehayas, Johan Bauwelinck:
A Low Power 2×28Gb/s Electroabsorption Modulator Driver Array with On-Chip Duobinary Encoding. IEICE Trans. Commun. 97-B(8): 1623-1629 (2014) - [c3]Xin Yin, Xing-Zhi Qiu, Guy Torfs, Christophe van Praet, Renato Vaernewyck, Arno Vyncke, Jochen Verbrugghe, Bart Moeneclaey, Marco Ruffini, David B. Payne, Johan Bauwelinck:
Performance evaluation of single carrier 40-Gbit/s downstream for long-reach passive optical networks. ONDM 2014: 162-167 - 2012
- [j1]Xin Yin, Xing-Zhi Qiu, Jan Gillis, Jasmien Put, Jochen Verbrugghe, Johan Bauwelinck, Jan Vandewege, Heinz-Georg Krimmel, Dora van Veen, Peter Vetter, Frank Chang:
Experiments on a 10 Gb/s Fast-Settling High-Sensitivity Burst-Mode Receiver With On-Chip Auto-Reset for 10G-GPONs [Invited]. JOCN 4(11): B68-B76 (2012) - [c2]Xin Yin, Jasmien Put, Jochen Verbrugghe, Jan Gillis, Xing-Zhi Qiu, Johan Bauwelinck, Jan Vandewege, Heinz-Georg Krimmel, Mohand Achouche:
A 10Gb/s burst-mode TIA with on-chip reset/lock CM signaling detection and limiting amplifier with a 75ns settling time. ISSCC 2012: 416-418
2000 – 2009
- 2009
- [c1]Jochen Verbrugghe, Maarten De Bock, Pieter Rombouts:
Design of an integrated analog controller for a class-D audio amplifier. ICECS 2009: 727-730
Coauthor Index
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