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Pei-Ning Guo

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Journal Articles

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2001
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Pei-Ning Guo, Toshihiko Takahashi, Chung-Kuan Cheng, Takeshi Yoshimura:
Floorplanning using a tree representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2): 281-289 (2001)
1999
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Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng:
Sequence-pair approach for rectilinear module placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(4): 484-493 (1999)
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Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng:
Empirical Study of Block Placement by Cluster Refinement. VLSI Design 10(1): 71-86 (1999)

Conference and Workshop Papers

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2003
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  - conf/fpga/SuarisWGC03
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Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou:
A physical retiming algorithm for field programmable gate arrays. FPGA 2003: 247
1999
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Pei-Ning Guo, Chung-Kuan Cheng, Takeshi Yoshimura:
An O-Tree Representation of Non-Slicing Floorplan and Its Applications. DAC 1999: 268-273
1998
[c2]
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Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng:
Rectilinear block placement using sequence-pair. ISPD 1998: 173-178
1997
[c1]
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Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng:
Cluster Refinement for Block Placement. DAC 1997: 762-765

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