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ORCIDThomas Pflüger
Person information
- affiliation: IBM Entwicklung GmbH, Böblingen, Germany
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Journal Articles
- 2023
[j6]Thomas Pflüger:
Editorial. Zeitschrift für Bibliothekswesen und Bibliographie (ZfBB) 70(5): 243-247 (2023)- 2015
- [j5]Balaram Sinharoy, Randal C. Swanberg, Naresh Nayar, Bruce G. Mealey, Jeffrey Stuecheli, Berni Schiefer, Jens Leenstra, Joefon Jann, P. Oehler, D. Levitan, S. Eisen, D. Sanner, Thomas Pflueger, Cédric Lichtenau, W. E. Hall, T. Block:
Advanced features in IBM POWER8 systems. IBM J. Res. Dev. 59(1) (2015) - 2012
- [j4]Tobias Webel, Thomas Pflueger, Ralf Ludewig, Cédric Lichtenau, Walter Niklaus, Ralf Schaufler:
Scalable and modular pervasive logic/firmware design. IBM J. Res. Dev. 56(1): 5 (2012) - 2005
- [j3]Norman J. Rohrer, Cédric Lichtenau, Peter A. Sandon, Paul Kartschoke, Erwin B. Cohen, Miles G. Canada, Thomas Pflüger, Mathew I. Ringler, Rolf B. Hilgendorf, Stephen F. Geissler, Jeffrey S. Zimmerman:
A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features. IEEE J. Solid State Circuits 40(1): 19-27 (2005) - 1997
- [j2]Gerhard Döttling, Klaus Joerg Getzlaff, Bernd Leppla, Walter Lipponer, Thomas Pflueger, Thomas Schlipf, Dietmar Schmunkamp, Udo Wille:
S/390 Parallel Enterprise Server Generation 3: A balanced system and cache structure. IBM J. Res. Dev. 41(4&5): 405-428 (1997) - [j1]Bernhard Kick, Ulrich Baur, Jürgen Koehl, Thomas Ludwig, Thomas Pflueger:
Standard-cell-based design methodology for high-performance support chips. IBM J. Res. Dev. 41(4&5): 505-514 (1997)
Conference and Workshop Papers
- 2006
- [c2]Erwin B. Cohen, Norman J. Rohrer, Peter A. Sandon, Miles G. Canada, Cédric Lichtenau, Mathew I. Ringler, Paul Kartschoke, Robert Floyd, Jan Heaslip, M. Ross, Thomas Pflueger, Rolf B. Hilgendorf, Pete McCormick, Gerard Salem, J. Connor, Stephen F. Geissler, Dana Thygesen:
A 64B CPU Pair: Dual- and Single-Processor Chips. ISSCC 2006: 333-342 - 1998
- [c1]Jürgen Koehl, Ulrich Baur, Thomas Ludwig, Bernhard Kick, Thomas Pflueger:
A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset. DATE 1998: 312-320
Coauthor Index
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