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2020 – today
- 2024
[j11]Ka-Hyeon Lee
, Su-Jeong Yun, Jeong-Nam Lee, Young-Kyun Cho:
A Compact Slotted Waveguide Array Antenna With a Cubic Post Radiator for Aerial Vehicle Applications. IEEE Access 12: 69301-69309 (2024)- [j10]Young-Kyun Cho:
A Single Op-Amp Resonator-Based Continuous-Time Sigma-Delta Modulator With Time-Division Switching for Excess Loop Delay Compensation. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 1789-1793 (2024) - [j9]Gyeong-Seop Lim, Wi-Min Kim, Young-Kyun Cho, Sang-Won Lee:
Quasi-Resonant Fly-Buck Converter With Active Switching for Improved Output Voltage Boosting and Regulation. IEEE Trans. Ind. Electron. 71(10): 12153-12164 (2024) - [j8]Young-Kyun Cho:
A Dual-Mode Continuous-Time Sigma-Delta Modulator With a Reconfigurable Loop Filter Based on a Single Op-Amp Resonator. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1754-1758 (2024) - 2023
- [j7]Jae-Eun Lee, Young-Kyun Cho, Choul-Young Kim:
Compact size buck converter using small output capacitance with pole-tuning technique. Microelectron. J. 135: 105743 (2023) - 2022
- [j6]Young-Kyun Cho, Jae-Won Nam, Sang-Won Lee:
A Low-Power Class-C Voltage-Controlled Oscillator With Robust Start-Up and Compact High-Q Capacitor Array. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 819-823 (2022)
2010 – 2019
- 2018
- [j5]Young-Kyun Cho, Myung-Don Kim, Choul-Young Kim:
A Low-Power Continuous-Time Delta-Sigma Modulator Using a Resonant Single Op-Amp Third-Order Loop Filter. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 854-858 (2018) - 2015
- [j4]Sung Jun Lee, Young-Kyun Cho, Jae Ho Jung:
Compensation technique for time alignment of envelope and phase paths in an envelope delta-sigma modulator. IEICE Electron. Express 12(13): 20150372 (2015) - 2012
- [c4]Young-Kyun Cho, Jae Ho Jung, Kwang Chun Lee:
A 9-bit 100-MS/s flash-SAR ADC without track-and-hold circuits. ISWCS 2012: 880-884 - [c3]Young-Kyun Cho, Sung Jun Lee, Seung Hyun Jang, Bong Hyuk Park, Jae Ho Jung, Kwang Chun Lee:
20-MHz bandwidth continuous-time delta-sigma modulator for EPWM transmitter. ISWCS 2012: 885-889 - 2011
- [j3]Jae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Jong-Kee Kwon:
A 12-bit 200-MS/s pipelined A/D converter with sampling skew reduction technique. Microelectron. J. 42(11): 1225-1230 (2011) - [j2]Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon:
A 10-bit 30-MS/s successive approximation register analog-to-digital converter for low-power sub-sampling applications. Microelectron. J. 42(12): 1335-1342 (2011) - 2010
- [j1]Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon:
A 9-bit 80 MS/s Successive Approximation Register Analog-to-Digital Converter With a Capacitor Reduction Technique. IEEE Trans. Circuits Syst. II Express Briefs 57-II(7): 502-506 (2010) - [c2]Young-Deuk Jeon, Young-Kyun Cho, Jae-Won Nam, Kwi-Dong Kim, Woo-Yol Lee, Kuk-Tae Hong, Jong-Kee Kwon:
A 9.15mW 0.22mm2 10b 204MS/s pipelined SAR ADC in 65nm CMOS. CICC 2010: 1-4
2000 – 2009
- 2009
- [c1]Jae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Sang-Gug Lee, Jong-Kee Kwon:
A 2.85mW 0.12mm2 1.0V 11-bit 20-MS/s algorithmic ADC in 65nm CMOS. ESSCIRC 2009: 468-471
Coauthor Index
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