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Lori E. Lucke
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2010 – 2019
- 2019
- [c14]Vlad Bluvshtein, Lori Lucke, Matt Widule:
Stabilization of Electrosurgical Cutting Performance Based on Electrode Speed. EMBC 2019: 166-169 - 2014
- [c13]Lori Lucke, Vlad Bluvshtein:
Safety considerations for wireless delivery of continuous power to implanted medical devices. EMBC 2014: 286-289 - 2013
- [c12]Kelly Byron, Vlad Bluvshtein, Lori Lucke:
Genetic algorithm optimization of transcutaneous energy transmission systems for implantable ventricular assist devices. EMBC 2013: 659-662
2000 – 2009
- 2000
- [j7]Chaitali Chakrabarti, Lori E. Lucke:
VLSI architectures for weighted order statistic (WOS) filters. Signal Process. 80(8): 1419-1433 (2000)
1990 – 1999
- 1998
- [j6]Lori Lucke:
Signal Processing for Magnetic and Optical Recording. IEEE Signal Process. Mag. 15(4): 52-53 (1998) - [j5]Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
:
ILP-based cost-optimal DSP synthesis with module selection and data format conversion. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 582-594 (1998) - 1996
- [c11]Byron de Jesus, Lori E. Lucke:
a Similarity analysis of cardiac signals using temporal features. ICASSP 1996: 3498-3501 - 1995
- [j4]Lori Lucke, Chaitali Chakrabarti:
A digit-serial architecture for gray-scale morphological filtering. IEEE Trans. Image Process. 4(3): 387-391 (1995) - [c10]Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke:
Low power data format converter design using semi-static register allocation. ICCD 1995: 460-465 - [c9]Shaomin Peng, Lori Lucke:
A hybrid filter for image enhancement. ICIP 1995: 163-166 - [c8]Shaomin Peng, Lori Lucke:
Multi-Level Adaptive Fuzzy Filter for Mixed Noise Removal. ISCAS 1995: 1524-1527 - 1994
- [j3]George B. Adams III, Edward J. Coyle
, Liangchien Lin, Lori E. Lucke, Keshab K. Parhi
:
Input compression and efficient VLSI architectures for rank order and stack filters. Signal Process. 38(3): 441-453 (1994) - [j2]Lori E. Lucke, Keshab K. Parhi
:
Parallel processing architectures for rank order and stack filters. IEEE Trans. Signal Process. 42(5): 1178-1189 (1994) - [c7]Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
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Module selection and data format conversion for cost-optimal DSP synthesis. ICCAD 1994: 322-329 - [c6]Chaitali Chakrabarti, Lori Lucke:
Efficient Architectures for Hidden Surface Removal. ICIP (1) 1994: 661-665 - [c5]Lori Lucke, Randall A. Kroenke:
Training Recursive Structures for Weighted Order Statistic Filtering. ISCAS 1994: 185-188 - [c4]Lori Lucke, Chaitali Chakrabarti:
A Digit-Serial Architecture for Gray-Scale Morphological Filtering. ISCAS 1994: 207-210 - 1993
- [j1]Lori E. Lucke, Keshab K. Parhi
:
Data-flow transformations for critical path time reduction in high-level DSP synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(7): 1063-1068 (1993) - [c3]Lori E. Lucke, Keshab K. Parhi
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Parallel processing architectures for rank order and stack filters. ASAP 1993: 65-76 - [c2]Lori E. Lucke, Keshab K. Parhi
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Block processing for rank order filtering using the rank order state machine architecture. ICASSP (1) 1993: 357-360 - 1992
- [c1]Lori E. Lucke, Keshab K. Parhi
:
Parallel structures for rank order and stack filters. ICASSP 1992: 645-648
Coauthor Index
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