Novel Trigger Circuit & SCR Device Co-Engineering Based Local (I/O-VSS & I/O-VDD) ESD Clamp Concepts with Improved Latch-Up Susceptibility, Lower Leakage and Lower Capacitance for Ultra High Speed I/Os.

Wed, 01 Jan 2025 00:00:00 +0100

Mitesh Goyal, Mukesh Chaturvedi, Harihar Nath, Mahesh Vaidya, Mayank Shrivastava:
Novel Trigger Circuit & SCR Device Co-Engineering Based Local (I/O-VSS & I/O-VDD) ESD Clamp Concepts with Improved Latch-Up Susceptibility, Lower Leakage and Lower Capacitance for Ultra High Speed I/Os. IRPS 2025: 1-8