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Gopinath Narayanan Pandurangan

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2020 – today

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2024
[j2]
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  - journals/tcasII/SathikPHVMA24
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M. Jagabar Sathik, Gopinath Narayanan Pandurangan, Arpan Hota, K. Vijayakumar, Saad Mekhilef, Vivek Agarwal:
Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 3221-3225 (2024)
2023
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Jagabar Sathik Mohamed Ali, Amjad Rehman Khan, Gopinath Narayanan Pandurangan, Prem Ponnusamy, Faten S. Alamri, Saeed Ali Bahaj:
A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage Stress. IEEE Access 11: 139785-139797 (2023)

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