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ORCIDSeung-Tak Ryu
- > Home > Persons > Seung-Tak Ryu
Publications
- 2018
[j35]Hyun-Wook Kang
, Hyeok-Ki Hong, Wan Kim, Seung-Tak Ryu:
A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme. IEEE J. Solid State Circuits 53(9): 2584-2594 (2018)- 2016
- [j26]Wan Kim, Hyeok-Ki Hong, Yi-Ju Roh, Hyun-Wook Kang, Sun-Il Hwang, Dong-Shin Jo, Dong-Jin Chang, Min-Jae Seo, Seung-Tak Ryu:
A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC. IEEE J. Solid State Circuits 51(8): 1826-1839 (2016) - [j24]Hyun-Wook Kang, Hyeok-Ki Hong, Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn, Seung-Tak Ryu:
A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs. IEEE Trans. Circuits Syst. II Express Briefs 63-II(6): 518-522 (2016) - [j23]Si-Nai Kim, Mee-Ran Kim, Ba-Ro-Saim Sung, Hyun-Wook Kang, Min-Hyung Cho, Seung-Tak Ryu:
A SUC-Based Full-Binary 6-bit 3.1-GS/s 17.7-mW Current-Steering DAC in 0.038 mm2. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 794-798 (2016) - 2015
- [j22]Hyun-Wook Kang, Hyeok-Ki Hong, Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn, Seung-Tak Ryu:
Ternary-level thermometer C-DAC switching scheme for flash-assisted SAR ADCs. IEICE Electron. Express 12(10): 20150302 (2015) - [j21]Hyeok-Ki Hong, Wan Kim, Hyun-Wook Kang, Sun-Jae Park, Michael Choi, Ho-Jin Park, Seung-Tak Ryu:
A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC. IEEE J. Solid State Circuits 50(2): 543-555 (2015) - [c17]Hyeok-Ki Hong, Hyun-Wook Kang, Dong-Shin Jo, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu:
26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique. ISSCC 2015: 1-3 - 2013
- [j13]Chang-Kyo Lee, Wan Kim, Hyun-Wook Kang, Seung-Tak Ryu:
A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 557-561 (2013) - [c10]Hyeok-Ki Hong, Hyun-Wook Kang, Barosaim Sung, Choong-Hoon Lee, Michael Choi, Ho-Jin Park, Seung-Tak Ryu:
An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement. ISSCC 2013: 470-471
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