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Teodoro Urso
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2020 – today
- 2025
- [j2]Roberto Bosio, Giovanni Brignone, Teodoro Urso, Mihai T. Lazarescu, Luciano Lavagno, Paolo Pasini:
Low-Power Subgraph Isomorphism at the Edge Using FPGAs. IEEE Access 13: 67127-67135 (2025) - [j1]Roberto Bosio, Filippo Minnella, Teodoro Urso, Mario R. Casu, Luciano Lavagno, Mihai T. Lazarescu, Paolo Pasini:
NN2FPGA: Optimizing CNN Inference on FPGAs With Binary Integer Programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(5): 1807-1818 (2025) - 2023
- [i3]Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi
, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini
, Gian Carlo Cardarilli, Robert Birke:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR abs/2306.15552 (2023) - [i2]Filippo Minnella
, Teodoro Urso, Mihai T. Lazarescu, Luciano Lavagno:
Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis. CoRR abs/2309.15631 (2023) - [i1]Fabrizio Ferrandi
, Serena Curzel, Leandro Fiorin, Daniele Ielmini, Cristina Silvano, Francesco Conti, Alessio Burrello, Francesco Barchi, Luca Benini, Luciano Lavagno, Teodoro Urso, Enrico Calore, Sebastiano Fabio Schifano, Cristian Zambelli, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Nicola Petra, Davide De Caro, Gennaro Di Meo
, Valeria Cardellini
, Salvatore Filippone, Francesco Lo Presti, Francesco Silvestri, Paolo Palazzari, Stefania Perri:
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. CoRR abs/2311.17815 (2023)
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