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Richard Cliff
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2000 – 2009
- 2007
- [c7]Simar Maangat, Toan Nguyen, Wilson Wong, Sergey Y. Shumarayev, Tina Tran, Tim Hoang, Richard Cliff:
Receiver Offset Cancellation in 90-nm PLD Integrated SERDES. CICC 2007: 265-267 - 2005
- [c6]David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose:
The Stratix II logic and routing architecture. FPGA 2005: 14-20 - 2003
- [c5]David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose:
The StratixTM routing and logic architecture. FPGA 2003: 12-20
1990 – 1999
- 1999
- [c4]Richard Cliff, Srinivas Reddy, Cameron McClintock, David Jefferslon, Christopher Lane, Ketan Zaveri, Manuel Mejia, Andy Lee, Ninh Ngo, Risa Altaf, Bruce Pedersen, Frank Heile, Jay Schleicher, John Turner:
A next generation architecture optimized for high density system level integration. CICC 1999: 175-178 - 1998
- [c3]Chiakang Sung, Richard Cliff, Joseph Huang, Bonnie Wang, Khai Nguyen, Xtaobao Wang, Kerry Veenstra, Bruce Pedersen, John Turner:
A silicon efficient FLEX 6000 programmable logic architecture. CICC 1998: 273-276 - [c2]David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff:
A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). FPGA 1998: 256 - 1995
- [c1]John Turner, Richard Cliff, W. Leong, Cameron McClintock, Ninh Ngo, Khai Nguyen, Chiakang Sung, Bonnie Wang, J. Watson:
Migration of a Dual Granularity Globally Interconnected PLD Architecture to a 0.5 µm TLM Process. FPL 1995: 15-20
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