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Mohammad Sepehr Pourghannad
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2020 – today
- 2024
- [c3]Sahand Kashani, Mahyar Emami, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus:
A 475 MHz Manycore FPGA Accelerator for RTL Simulation. FPGA 2024: 78-84 - [c2]Dan Graur, Oto Mraz, Muyu Li, Mohammad Sepehr Pourghannad, Chandramohan A. Thekkath, Ana Klimovic:
Pecan: Cost-Efficient ML Data Preprocessing with Automatic Transformation Ordering and Hybrid Placement. USENIX ATC 2024: 649-665 - 2023
- [c1]Mahyar Emami, Sahand Kashani, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus:
Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism. ASPLOS (4) 2023: 219-237 - [i1]Mahyar Emami, Sahand Kashani, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus:
Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism. CoRR abs/2301.09413 (2023)
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last updated on 2024-07-17 21:27 CEST by the dblp team
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