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2000 – 2009
- 2005
[j2]Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena:
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 40(1): 52-59 (2005)- 2002
- [j1]Georgios K. Konstadinidis, Kevin Normoyle, Samson Wong, Sutikshan Bhutani, Harry Stuimer, Timothy Johnson, Alan P. Smith, Daniel Y. Cheung, Fabrizio Romano, Shifeng Yu, Sung-Hun Oh, Victor Melamed, Sridhar Narayanan, David Bunsey, Cong Khieu, Kevin J. Wu, Ralf Schmitt, Andy Dumlao, Massimo Sutera, Jade Chau, K. James Lin, William S. Coates:
Implementation of a third-generation 1.1-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 37(11): 1461-1469 (2002)
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