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Karthik Gopalakrishnan
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- Karthik Gopalakrishnan 0001
— Amazon Alexa AI, Sunnyvale, CA, USA (and 2 more)
- Karthik Gopalakrishnan 0002
— Massachusetts Institute of Technology, Department of Aeronautics and Astronautics, Cambridge, MA, USA
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Conference and Workshop Papers
- 2020
- [c10]Mahindra Rautela
, S. Gopalakrishnan, Karthik Gopalakrishnan, Yiming Deng:
Ultrasonic Guided Waves Based Identification of Elastic Properties Using 1D-Convolutional Neural Networks. ICPHM 2020: 1-7 - 2016
- [c9]Karthik Gopalakrishnan, Alan Ren, Amber Tan, Arash Farhood, Arun Tiruvur, Belal Helal, Chang-Feng Loi, Chris Jiang, Halil Cirit, Irene Quek, Jamal Riani, James Gorecki, Jennifer Wu, Jorge Pernillo, Lawrence Tse, Michael Q. Le, Mohammad Ranjbar, Pui-Shan Wong, Pulkit Khandelwal, Rajesh Narayanan, Ravindran Mohanavelu, Sameer Herlekar, Sudeep Bhoja, Vlad Shvydun:
3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS. ISSCC 2016: 62-63 - [c8]Frank Y. Chang, Sudeep Bhoja, Jamal Riani, Ishwar Hosagrahar, Jennifer Wu, Sameer Herlekar, Arun Tiruvur, Pulkit Khandelwal, Karthik Gopalakrishnan:
Link performance investigation of industry first 100G PAM4 IC chipset with real-time DSP for data center connectivity. OFC 2016: 1-3 - 2012
- [c7]Mike Harwood, Steffen Nielsen, Andre Szczepanek, Richard Allred, Sean Batty, Mike Case, Simon Forey, Karthik Gopalakrishnan, Larry Kan, Bob Killips, Parmanand Mishra, Rohit Pande, Hamid Rategh, Alan Ren, Jeff Sanders, Albrecht Schoy, Richard Ward, Martin Wetterhorn, Norman Yeung:
A 225mW 28Gb/s SerDes in 40nm CMOS with 13dB of analog equalization for 100GBASE-LR4 and optical transport lane 4.4 applications. ISSCC 2012: 326-327 - 2009
- [c6]Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Gangadharappa, Dhabaleswar K. Panda:
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture. HiPC 2009: 99-108 - [c5]Xiangyong Ouyang, Karthik Gopalakrishnan, Dhabaleswar K. Panda:
Accelerating Checkpoint Operation by Node-Level Write Aggregation on Multicore Systems. ICPP 2009: 34-41 - [c4]Hamid Partovi, Karthik Gopalakrishnan, Luca Ravezzi, Russell Homer, Otto Schumacher, Reinhold Unterricker, Werner Kederer:
Single-ended transceiver design techniques for 5.33Gb/s graphics applications. ISSCC 2009: 136-137 - 2008
- [c3]Matthew J. Koop, Wei Huang, Karthik Gopalakrishnan, Dhabaleswar K. Panda:
Performance Analysis and Evaluation of PCIe 2.0 and Quad-Data Rate InfiniBand. Hot Interconnects 2008: 85-92 - 2006
- [c2]Hamid Partovi, Wolfgang Walthes, Luca Ravezzi, Paul Lindt, Sivaraman Chokkalingam, Karthik Gopalakrishnan, Andreas Blum, Otto Schumacher, Claudio Andreotti, Michael Bruennert, Bruno Celli-Urbani, Dirk Friebe, Ivo Koren, Michael Verbeck, Ulrich Lange:
Data Recovery and Retiming for the Fully Buffered DIMM 4.8Gb/s Serial Links. ISSCC 2006: 1314-1323 - 2003
- [c1]Hamid Partovi, Bill Evans, Tom Wilson, Scott Shelton, Eric Naviasky, Ethiraj Sanjeevi, Yongli Wen, Karthik Gopalakrishnan, Sivaraman Chokalingam, Hugh Thompson, Mike Casas, Lingting Ye, Mike Hufford, Yujing Qiu, Michelle Williams, Jared James, Alberto Baldisserotto, Steven White, Steve Williams, Domenic Georgantas, Tom Gray:
A 62.5 Gb/s multi-standard SerDes IC. CICC 2003: 585-588
Informal and Other Publications
- 2020
- [i1]Karthik Gopalakrishnan, Fathi M. Salem:
Sentiment Analysis Using Simplified Long Short-term Memory Recurrent Neural Networks. CoRR abs/2005.03993 (2020)
Coauthor Index
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
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