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Tetsuo Nakano
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1990 – 1999
- 1994
- [j2]Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh:
3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor. IEEE J. Solid State Circuits 29(3): 298-302 (1994) - [j1]Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura:
A 120-MHz BiCMOS superscalar RISC processor. IEEE J. Solid State Circuits 29(4): 389-396 (1994)
1980 – 1989
- 1989
- [c1]Yasuhiro Nakatsuka, Takashi Hotta, Shigeya Tanaka, Tadaaki Bandoh, Ryuichi Satomura, Syuichi Nakagami, Tetsuo Nakano, Atsuo Hotta, Takashi Moriyama, Shigemi Adachi, Shoji Iwamoto:
A high performance BiCMOS 32-bit microprocessor. ICCD 1989: 358-361
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