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Changjoo Park
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2020 – today
- 2024
- [j2]Changjoo Park, Jeongmyeong Kim, Kyounghun Kang, Minkyu Yang, Byeongmin Moon, Siheon Lee, Wanyeong Jung:
A High-Resolution Pipelined-SAR ADC Using Cyclically Charged Floating Inverter Amplifier. IEEE J. Solid State Circuits 59(10): 3242-3252 (2024) - [c3]Minkyu Yang, Changjoo Park, Wanyeong Jung:
A Compact and Low-Power Column Readout Circuit based on Digital Delay Chain. ISCAS 2024: 1-5 - [c2]Jeongmyeong Kim, Changjoo Park, Wanyeong Jung:
A 0.6-1 V $\mathrm{V}_{\text{IN}}$ Soft-Switching Low Dropout Regulator with 31.3 A/mm2 Current Density, 99.99% Current Efficiency, and 2.04 fs FoM. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c1]Changjoo Park, Jeongmyeong Kim, Kyounghun Kang, Minkyu Yang, Byeongmin Moon, Siheon Lee, Wanyeong Jung:
A 74.0 dB-SNDR 175.4 dB-FoM Pipelined-SAR ADC Using a Cyclically Charged Floating Inverter Amplifier. A-SSCC 2023: 1-3 - 2021
- [j1]Changjoo Park, Yang Azevedo Tavares, Junyong Lee, Jiwon Wo, Minjae Lee:
5th-Order Continuous-Time Low-Pass Filter Achieving 56 MHz Bandwidth 30.5 dBm IIP3 With a Novel Low-Distortion Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1768-1772 (2021)
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last updated on 2024-10-23 21:22 CEST by the dblp team
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