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Journal Articles
- 2022
[j3]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient software packet processing on FPGA NICs. Commun. ACM 65(8): 92-100 (2022)- [j2]Alessandro Palumbo, Luca Cassano
, Bruno Luzzi, José Alberto Hernández, Pedro Reviriego, Giuseppe Bianchi, Marco Ottavi:
Is your FPGA bitstream Hardware Trojan-free? Machine learning can provide an answer. J. Syst. Archit. 128: 102543 (2022) - [j1]Kerem Arikan, Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Salvatore Pontarelli, Giuseppe Bianchi, Oguz Ergin, Marco Ottavi:
Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 938-951 (2022)
Conference and Workshop Papers
- 2024
- [c7]Stefano Ribes, Fabio Malatesta, Grazia Garzo, Alessandro Palumbo:
Machine Learning-Based Classification of Hardware Trojans in FPGAs Implementing RISC-V Cores. ICISSP 2024: 717-724 - 2023
- [c6]Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Marco Ottavi:
Improving the Detection of Hardware Trojan Horses in Microprocessors via Hamming Codes. DFT 2023: 1-6 - [c5]Alessandro Palumbo, Marco Ottavi, Luca Cassano:
Built-in Software Obfuscation for Protecting Microprocessors against Hardware Trojan Horses. DFT 2023: 1-6 - [c4]Pegdwende Romaric Nikiema, Alessandro Palumbo, Allan Aasma, Luca Cassano, Angeliki Kritikakou, Ari Kulmala, Jari Lukkarila, Marco Ottavi, Rafail Psiakis, Marcello Traiola:
Towards Dependable RISC-V Cores for Edge Computing Devices. IOLTS 2023: 1-7 - 2022
- [c3]Luca Cassano, Stefano Di Mascio, Alessandro Palumbo, Alessandra Menicucci, Gianluca Furano, Giuseppe Bianchi, Marco Ottavi:
Is RISC-V ready for Space? A Security Perspective. DFT 2022: 1-6 - 2021
- [c2]Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Giuseppe Bianchi, Marco Ottavi:
A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. DFT 2021: 1-6 - 2020
- [c1]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient Software Packet Processing on FPGA NICs. OSDI 2020: 973-990
Informal and Other Publications
- 2020
- [i1]Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola, Salvatore Pontarelli, Giuseppe Siracusano, Giuseppe Bianchi, Aniello Cammarano, Alessandro Palumbo, Luca Petrucci, Roberto Bifulco:
hXDP: Efficient Software Packet Processing on FPGA NICs. CoRR abs/2010.14145 (2020)
Coauthor Index
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