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ORCIDMoisés Arredondo-Velázquez
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Journal Articles
- 2023
[j4]Moisés Arredondo-Velázquez, Lucio Fidel Rebolledo-Herrera, Benito de Celis Alonso
, Eduardo Moreno-Barbosa:
Potential Use of State-of-the-Art TDCs for Particle Identification in Particle Physics Experiments. IEEE Instrum. Meas. Mag. 26(6): 13-20 (2023)- [j3]Moisés Arredondo-Velázquez, Lucio Fidel Rebolledo-Herrera, Heber Zepeda-Fernández, Eduardo Moreno-Barbosa:
Trimmed-TDL-Based TDC Architecture for Time-of-Flight Measurements Tested on a Cyclone V FPGA. IEEE Trans. Instrum. Meas. 72: 1-9 (2023) - 2020
- [j2]Moisés Arredondo-Velázquez, Javier Díaz-Carmona, César Torres-Huitzil, José Alfredo Padilla-Medina, Juan Prado-Olivarez:
A streaming architecture for Convolutional Neural Networks based on layer operations chaining. J. Real Time Image Process. 17(5): 1715-1733 (2020) - 2019
- [j1]Moisés Arredondo-Velázquez, Javier Díaz-Carmona, César Torres-Huitzil, Alejandro Israel Barranco Gutiérrez, José Alfredo Padilla-Medina, Juan Prado-Olivarez:
A streaming accelerator of Convolutional Neural Networks for resource-limited applications. IEICE Electron. Express 16(23): 20190633 (2019)
Conference and Workshop Papers
- 2024
- [c3]Moisés Arredondo-Velázquez, Arturo A. Márquez Carranza, Eduardo Moreno-Barbosa:
NN-Based Encoding Applied to a Time-to-Digital Converter for Time Interval Measurements. TSP 2024: 223-226 - [c2]Reyes Perez Melesio, Moisés Arredondo-Velázquez, Javier Díaz-Carmona:
Hardware Parallel Structure for Convolution Computing in Image Processing. TSP 2024: 307-310 - 2022
- [c1]Paulo Aaron Aguirre-Álvarez, Javier Díaz-Carmona, Moisés Arredondo-Velázquez:
Hardware Flexible Systolic Architecture for Convolution Accelerator in Convolutional Neural Networks. TSP 2022: 305-309
Coauthor Index
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