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Rathnamala Rao
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2020 – today
- 2024
- [j4]M. N. Saranya, Rathnamala Rao:
Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems. J. Electron. Test. 40(1): 61-74 (2024) - 2023
- [c1]Sriraj Chennamadhavuni, Shara Mathew, Rathnamala Rao:
An Exploration of the Effective Path for Current Conduction in a Triple Gate Junctionless FinFET. TENCON 2023: 473-478 - 2021
- [j3]P. Divijesh Puninchathaya, Muralidhara Rao, Rathnamala Rao, Sushith Kumar, Rehna M. Ahmed:
Experimental Investigations on Flexurally amplified piezoactuator based Active vibration Isolation System using PID controller. Mechatron. Syst. Control. 49(3) (2021) - 2020
- [j2]K. Sravani, Rathnamala Rao:
Design of high throughput asynchronous FIR filter using gate level pipelined multipliers and adders. Int. J. Circuit Theory Appl. 48(8): 1363-1370 (2020) - [j1]K. Sravani, Rathnamala Rao:
A High Performance Early Acknowledged Asynchronous Pipeline using Hybrid-logic Encoding. Integr. 71: 134-143 (2020)
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last updated on 2024-06-03 01:01 CEST by the dblp team
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