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2010 – 2019
- 2019
[c13]Marjan Radi, Wesley W. Terpstra, Paul Loewenstein, Dejan Vucinic:
OmniXtend: Direct to Caches Over Commodity Fabric. Hot Interconnects 2019: 59-62- 2016
- [j6]Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan YangGong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa:
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor. IEEE J. Solid State Circuits 51(1): 79-91 (2016) - 2015
- [j5]Kathirgamar Aingaran, Sumti Jairath, Georgios K. Konstadinidis, Serena Leung, Paul Loewenstein, Curtis McAllister, Stephen Phillips, Zoran Radovic, Ram Sivaramakrishnan, David Smentek, Thomas Wicki:
M7: Oracle's Next-Generation Sparc Processor. IEEE Micro 35(2): 36-45 (2015) - [c12]Penny Li, Jinuk Luke Shin, Georgios K. Konstadinidis, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister:
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor. ISSCC 2015: 1-3 - 2013
- [j4]John R. Feehrer, Sumti Jairath, Paul Loewenstein, Ram Sivaramakrishnan, David Smentek, Sebastian Turullols, Ali Vahidsafa:
The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets. IEEE Micro 33(2): 48-57 (2013) - no results
1990 – 1999
- 1995
- [c11]Lawrence Yang, David Gao, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein:
System Design Methodology of UltraSPARC-I. DAC 1995: 7-12 - [c10]Paul Loewenstein:
Formal Verification of Counterflow Pipeline Architecture. TPHOLs 1995: 261-276 - 1993
- [j3]Paul Loewenstein:
A Formal Theory of Simulations between Infinite Automata. Formal Methods Syst. Des. 3(1/2): 117-149 (1993) - 1992
- [j2]Paul Loewenstein:
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. Formal Methods Syst. Des. 1(4): 355-383 (1992) - [c9]Paul Loewenstein:
A Formal Theory of Simulations Between Infinite Automata. TPHOLs 1992: 227-246 - 1991
- [c8]Paul Loewenstein:
Learning to use HOL. TPHOLs 1991: 67-74 - 1990
- [c7]Paul Loewenstein, David L. Dill:
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. CAV 1990: 302-311 - [c6]Paul Loewenstein, David L. Dill:
Verification of Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. CAV (DIMACS/AMS volume) 1990: 187-206 - [c5]Paul Loewenstein, David L. Dill:
Formal verification of cache systems using refinement relations. ICCD 1990: 228-233 - no results
1980 – 1989
- 1989
- [c4]Paul Loewenstein:
Formal verification of state-machines using higher-order logic. ICCD 1989: 204-207 - [c3]Paul Loewenstein:
Reasoning about State Machines in Higher-Order Logic. Hardware Specification, Verification and Synthesis 1989: 67-89 - 1988
- [j1]Paul Loewenstein, Andrew Fox:
Closing the semantic gap. Microprocess. Microprogramming 24(1-5): 767-772 (1988) - 1983
- [c2]S. N. Terepin, Paul Loewenstein:
Architecture and instruction set of a programmable LSI digital filter. ICASSP 1983: 435-438 - 1982
- [c1]Paul Loewenstein:
Digital pulse frequency demodulation using state-space filtering. ICASSP 1982: 1829-1832 - no results
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