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Yemin Dong
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2020 – today
- 2024
- [j8]Wei Zhong
, Lili Lang
, Yemin Dong:
An all-digital low-complexity blind background calibration of timing mismatch in time-interleaved ADCs. Microelectron. J. 151: 106357 (2024) - 2023
- [j7]Yu Liu, Zhenwei Zhang, Lili Lang, Haijing Liu, Xufan Wu, Yemin Dong:
A fast-convergence, tree-structured, fully-parallel digital background timing mismatch calibration method for four-channel TIADC based on perfect reconstruction filter bank. Microelectron. J. 141: 105978 (2023) - [j6]Lin Sun, Zhenwei Zhang, Lili Lang
, Tong Kang, Wei Xiong, Yu Liu, Wei Zhong, Yemin Dong
:
An Adaptive and Universal Timing Mismatch Estimation Method for TIADCs. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1614-1618 (2023) - 2020
- [j5]Zhenwei Zhang, Lei Qiu, Yi Shan, Yemin Dong:
A 16-bit 8-MS/s SAR ADC with a foreground calibration and hybrid-charge-supply power structure. IEICE Electron. Express 17(10): 20200097 (2020) - [j4]Zhenwei Zhang, Yi Shan, Yemin Dong:
A 16 bit 200 kS/s successive approximation register ADC with foreground on-chip self-calibration. IEICE Electron. Express 17(10): 20200109 (2020) - [j3]Mo Zhou, Yi Shan, Yemin Dong:
An Enhanced Well-Changed GGNMOS for 3.3-V ESD Protection in 0.13-µm SOI Process. IEICE Trans. Electron. 103-C(6): 332-334 (2020) - [j2]Zhuojun Chen
, Ding Ding, Yemin Dong
, Yi Shan, Yun Zeng, Jiantou Gao
:
Design of a High-Performance Low-Cost Radiation-Hardened Phase-Locked Loop for Space Application. IEEE Trans. Aerosp. Electron. Syst. 56(5): 3588-3598 (2020)
2010 – 2019
- 2018
- [j1]Zongkun Zhou, Min Lin, Shuigen Huang, Ruoyu Wang, Yemin Dong:
A 12 bit 120 MS/s SHA-less pipeline ADC with capacitor mismatch error calibration. IEICE Electron. Express 15(13): 20180481 (2018)
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last updated on 2024-08-23 19:27 CEST by the dblp team
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