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2020 – today
- 2024
[j6]Fan Zhang
, Amitesh Sridharan, Wangxin He, Injune Yeo, Maximilian Liehr, Wei Zhang, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan:
A 65-nm RRAM Compute-in-Memory Macro for Genome Processing. IEEE J. Solid State Circuits 59(7): 2093-2104 (2024)- 2023
- [j5]Shreyas Kolala Venkataramanaiah, Jian Meng, Han-Sok Suh, Injune Yeo, Jyotishman Saikia, Sai Kiran Cherupally, Yichi Zhang, Zhiru Zhang, Jae-Sun Seo:
A 28-nm 8-bit Floating-Point Tensor Core-Based Programmable CNN Training Processor With Dynamic Structured Sparsity. IEEE J. Solid State Circuits 58(7): 1885-1897 (2023) - [c11]Gokul Krishnan, Gopikrishnan Raveendran Nair, Jonghyun Oh, Anupreetham Anupreetham, Pragnya Sudershan Nalla, Ahmed Hassan, Injune Yeo, Kishore Kasichainula, Jae-sun Seo, Mingoo Seok, Yu Cao:
3D-ISC: A 65nm 3D Compatible In-Sensor Computing Accelerator with Reconfigurable Tile Architecture for Real-Time DVS Data Compression. A-SSCC 2023: 1-3 - [c10]Injune Yeo, Dong-Woo Jee, Jae-Sun Seo:
A 92 F2 / bit Physically Unclonable Function Exploiting Channel Charge Injection and Mismatch Accumulation. CICC 2023: 1-2 - [c9]Dong-Woo Jee, Seong-Min Ko, Kishore Kasichainula, Injune Yeo, Yu Cao, Jae-Sun Seo:
A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image Processing. ESSCIRC 2023: 109-112 - [c8]Fan Zhang, Wangxin He, Injune Yeo, Maximilian Liehr, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan:
A 65nm RRAM Compute-in-Memory Macro for Genome Sequencing Alignment. ESSCIRC 2023: 117-120 - [c7]Jyotishman Saikia, Amitesh Sridharan, Injune Yeo, Shreyas K. Venkataramanaiah, Deliang Fan, Jae-Sun Seo:
FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro. ESSCIRC 2023: 405-408 - [c6]Tianyi Zhang, Kishore Kasichainula, Dong-Woo Jee, Injune Yeo, Yaoxin Zhuo, Baoxin Li, Jae-sun Seo, Yu Cao:
Improving the Efficiency of CMOS Image Sensors through In-Sensor Selective Attention. ISCAS 2023: 1-4 - 2022
- [j4]Jian Meng, Wonbo Shim, Li Yang, Injune Yeo, Deliang Fan, Shimeng Yu, Jae-sun Seo:
Temperature-Resilient RRAM-Based In-Memory Computing for DNN Inference. IEEE Micro 42(1): 89-98 (2022) - [j3]Gokul Krishnan, Zhenyu Wang, Injune Yeo, Li Yang, Jian Meng, Maximilian Liehr, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Jae-Sun Seo, Yu Cao:
Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4241-4252 (2022) - [c5]Shreyas Kolala Venkataramanaiah, Jian Meng, Han-Sok Suh, Injune Yeo, Jyotishman Saikia, Sai Kiran Cherupally, Yichi Zhang, Zhiru Zhang, Jae-sun Seo:
A 28nm 8-bit Floating-Point Tensor Core based CNN Training Processor with Dynamic Activation/Weight Sparsification. ESSCIRC 2022: 89-92 - [c4]Jian Meng, Injune Yeo, Wonbo Shim, Li Yang, Deliang Fan, Shimeng Yu, Jae-Sun Seo:
Sparse and Robust RRAM-based Efficient In-memory Computing for DNN Inference. IRPS 2022: 3 - 2021
- [j2]Injune Yeo, Sang-Gyun Gi, Gunuk Wang, Byung-Geun Lee:
A Hardware and Energy-Efficient Online Learning Neural Network With an RRAM Crossbar Array and Stochastic Neurons. IEEE Trans. Ind. Electron. 68(11): 11554-11564 (2021)
2010 – 2019
- 2019
- [j1]Injune Yeo, Myonglae Chu, Byung-Geun Lee:
A Power and Area Efficient CMOS Stochastic Neuron for Neural Networks Employing Resistive Crossbar Array. IEEE Trans. Biomed. Circuits Syst. 13(6): 1678-1689 (2019) - [c3]Injune Yeo, Sang-Gyun Gi, Jung-Gyun Kim, Byung-Geun Lee:
A CMOS-based Resistive Crossbar Array with Pulsed Neural Network for Deep Learning Accelerator. AICAS 2019: 34-37 - [c2]Sang-Gyun Gi, Injune Yeo, Byung-Geun Lee:
Implementation of STDP Learning for Non-volatile Memory-based Spiking Neural Network using Comparator Metastability. AICAS 2019: 239-243 - 2016
- [c1]Injune Yeo, Sang-Gyun Gi, Byung-Geun Lee, Myonglae Chu:
Stochastic implementation of the activation function for artificial neural networks. BioCAS 2016: 440-443
Coauthor Index
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last updated on 2024-10-07 22:10 CEST by the dblp team
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