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Albert Magyar
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2020 – today
- 2021
- [j2]David Biancolin
, Albert Magyar
, Sagar Karandikar
, Alon Amid
, Borivoje Nikolic
, Jonathan Bachrach, Krste Asanovic
:
Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro 41(4): 58-66 (2021) - 2020
- [j1]Alon Amid
, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew
, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
:
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro 40(4): 10-21 (2020) - [c4]Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew
, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic
, Krste Asanovic:
Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC 2020: 1-6
2010 – 2019
- 2019
- [c3]Albert Magyar, David Biancolin, John Koenig, Sanjit Seshia, Jonathan Bachrach, Krste Asanovic:
Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes. ICCAD 2019: 1-8 - 2017
- [c2]Adam M. Izraelevitz, Jack Koenig, Patrick Li, Richard Lin, Angie Wang, Albert Magyar, Donggyu Kim, Colin Schmidt, Chick Markley, Jim Lawson, Jonathan Bachrach:
Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. ICCAD 2017: 209-216 - [c1]Jonathan Bachrach, Albert Magyar, Daniel Palmer Dabbelt, Patrick Li, Richard Lin, Krste Asanovic:
Cyclist: Accelerating hardware development. ICCAD 2017: 1011-1018
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