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ORCIDJan Laukemann
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2020 – today
- 2024
[c8]Jan Laukemann, Thomas Gruber, Georg Hager, Dossay Oryspayev, Gerhard Wellein:
CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion. IPDPS 2024: 350-360- [i10]Jan Laukemann, Ahmed E. Helal, S. Isaac Geronimo Anderson, Fabio Checconi, Yongseok Soh, Jesmin Jahan Tithi, Teresa M. Ranadive, Brian J. Gravelle, Fabrizio Petrini, Jee W. Choi:
Accelerating Sparse Tensor Decomposition Using Adaptive Linearized Representation. CoRR abs/2403.06348 (2024) - [i9]Jan Laukemann, Georg Hager, Gerhard Wellein:
Microarchitectural comparison and in-core modeling of state-of-the-art CPUs: Grace, Sapphire Rapids, and Genoa. CoRR abs/2409.08108 (2024) - 2023
- [j3]Rafael Ravedutti Lucio Machado, Jan Eitzinger, Jan Laukemann, Georg Hager, Harald Köstler, Gerhard Wellein:
MD-Bench: A performance-focused prototyping harness for state-of-the-art short-range molecular dynamics algorithms. Future Gener. Comput. Syst. 149: 25-38 (2023) - [c7]Yongseok Soh, Ahmed E. Helal, Fabio Checconi, Jan Laukemann, Jesmin Jahan Tithi, Teresa M. Ranadive, Fabrizio Petrini, Jee W. Choi:
Dynamic Tensor Linearization and Time Slicing for Efficient Factorization of Infinite Data Streams. IPDPS 2023: 402-412 - [c6]Jan Laukemann
, Georg Hager:
Core-Level Performance Engineering with the Open-Source Architecture Code Analyzer (OSACA) and the Compiler Explorer. ICPE (Companion) 2023: 127-131 - [i8]Rafael Ravedutti Lucio Machado, Jan Eitzinger, Jan Laukemann, Georg Hager, Harald Köstler, Gerhard Wellein:
MD-Bench: Engineering the in-core performance of short-range molecular dynamics kernels from state-of-the-art simulation packages. CoRR abs/2302.14660 (2023) - [i7]Jan Laukemann, Thomas Gruber, Georg Hager, Dossay Oryspayev, Gerhard Wellein:
CloverLeaf on Intel Multi-Core CPUs: A Case Study in Write-Allocate Evasion. CoRR abs/2311.04797 (2023) - 2022
- [j2]Christie L. Alappat, Nils Meyer, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Tilo Wettig:
Execution-Cache-Memory modeling and performance tuning of sparse matrix-vector multiplication and Lattice quantum chromodynamics on A64FX. Concurr. Comput. Pract. Exp. 34(20) (2022) - [c5]Andy Nguyen, Ahmed E. Helal, Fabio Checconi, Jan Laukemann, Jesmin Jahan Tithi, Yongseok Soh, Teresa M. Ranadive, Fabrizio Petrini, Jee W. Choi:
Efficient, out-of-memory sparse MTTKRP on massively parallel architectures. ICS 2022: 26:1-26:13 - [i6]Andy Nguyen, Ahmed E. Helal, Fabio Checconi, Jan Laukemann, Jesmin Jahan Tithi, Yongseok Soh, Teresa M. Ranadive, Fabrizio Petrini, Jee W. Choi:
Efficient, Out-of-Memory Sparse MTTKRP on Massively Parallel Architectures. CoRR abs/2201.12523 (2022) - 2021
- [c4]Ahmed E. Helal, Jan Laukemann, Fabio Checconi, Jesmin Jahan Tithi, Teresa M. Ranadive, Fabrizio Petrini, Jeewhan Choi:
ALTO: adaptive linearized storage of sparse tensors. ICS 2021: 404-416 - [i5]Ahmed E. Helal, Jan Laukemann, Fabio Checconi, Jesmin Jahan Tithi, Teresa M. Ranadive, Fabrizio Petrini, Jeewhan Choi:
ALTO: Adaptive Linearized Storage of Sparse Tensors. CoRR abs/2102.10245 (2021) - [i4]Christie L. Alappat, Nils Meyer, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Tilo Wettig:
ECM modeling and performance tuning of SpMV and Lattice QCD on A64FX. CoRR abs/2103.03013 (2021) - 2020
- [c3]Christie L. Alappat, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Nils Meyer, Tilo Wettig:
Performance Modeling of Streaming Kernels and Sparse Matrix-Vector Multiplication on A64FX. PMBS@SC 2020: 1-7 - [i3]Christie L. Alappat, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Nils Meyer, Tilo Wettig:
Performance Modeling of Streaming Kernels and Sparse Matrix-Vector Multiplication on A64FX. CoRR abs/2009.13903 (2020)
2010 – 2019
- 2019
- [c2]Jan Laukemann, Julian Hammer, Georg Hager, Gerhard Wellein:
Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels. PMBS@SC 2019: 1-6 - [i2]Jan Laukemann, Julian Hammer, Georg Hager, Gerhard Wellein:
Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels. CoRR abs/1910.00214 (2019) - 2018
- [c1]Jan Laukemann, Julian Hammer, Johannes Hofmann, Georg Hager, Gerhard Wellein:
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. PMBS@SC 2018: 121-131 - [i1]Jan Laukemann, Julian Hammer, Johannes Hofmann, Georg Hager, Gerhard Wellein:
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. CoRR abs/1809.00912 (2018) - 2017
- [j1]Alexander Ditter, Jan Laukemann, Benedikt Oehlrich:
Reproducibility report: Team SegFAUlt @ SCC 2016. Parallel Comput. 70: 41-45 (2017)
Coauthor Index
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