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2020 – today
- 2021
[j3]Kwangho Lee
, Hyojun Kim, Woosong Jung, Jinhyung Lee, Haram Ju, Kwanseo Park, Ook Kim, Deog-Kyoon Jeong:
An Adaptive Offset Cancellation Scheme and Shared-Summer Adaptive DFE for 0.068 pJ/b/dB 1.62-to-10 Gb/s Low-Power Receiver in 40 nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 622-626 (2021)
2010 – 2019
- 2017
- [j2]Hyochang Kim, Ook Kim, Changsik Yoo:
Duty-cycle and phase spacing error correction circuit for high-speed serial link. IEICE Electron. Express 14(12): 20170497 (2017) - 2016
- [c2]Hyochang Kim, Jaewoo Park, Woosang Han, Kyuhwan Oh, Taekjun Ahn, Jun-Gi Jo, Ook Kim, Changsik Yoo:
A HDMI-to-MHL video format conversion system-on-chip (SoC) for mobile handset in a 130-nm CMOS technology. ICCE 2016: 504-505
2000 – 2009
- 2006
- [c1]Hyung-Rok Lee, Ook Kim, Keewook Jung, John Shin, Deog-Kyoon Jeong:
A PVT-Tolerant Low-1/f Noise Dual-Loop Hybrid PLL in 0.18µm. ISSCC 2006: 2402-2411 - 2001
- [j1]Chan-Hong Park, Ook Kim, Beomsup Kim:
A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching. IEEE J. Solid State Circuits 36(5): 777-783 (2001)
Coauthor Index
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