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Kazumasa Sunouchi

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2010 – 2019

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2017
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  dblp key:
  - conf/isscc/RhoTKSBINMCSPPY17
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Kwangmyoung Rho, Kenji Tsuchida, Dongkeun Kim, Yutaka Shirai, Jihyae Bae, Tsuneo Inaba, Hiromi Noro, Hyunin Moon, Sungwoong Chung, Kazumasa Sunouchi, Jinwon Park, Kiseon Park, Akihito Yamamoto, Seoungju Chung, Hyeongon Kim, Hisato Oyamatsu, Jonghoon Oh:
23.5 A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture. ISSCC 2017: 396-397

2000 – 2009

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2002
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Takashi Ohsawa, Katsuyuki Fujita, Tomoki Higashi, Yoshihisa Iwata, Takeshi Kajiyama, Yoshiaki Asao, Kazumasa Sunouchi:
Memory design using a one-transistor gain cell on SOI. IEEE J. Solid State Circuits 37(11): 1510-1522 (2002)

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