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Calebe Micael de Oliveira Conceição

Calebe Conceição

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2020 – today

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2020
[c6]
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Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Security Issues in the Design of Chips for IoT. WF-IoT 2020: 1-5

2010 – 2019

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2019
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Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Transistor Count Reduction by Gate Merging. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2175-2187 (2019)
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Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Netlist Optimization by Gate Merging. VLSI-SoC 2019: 236-237
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Kevin A. Cáceres Albinagorta, Calebe Conceição, Carlos Silva Cárdenas, Ricardo A. L. Reis:
Exploring area and total wirelength using a cell merging technique. VLSI-SoC 2019: 329-334
2017
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Calebe Conceição, Gisell Moura, Filipe Pisoni, Ricardo Reis:
A cell clustering technique to reduce transistor count. ICECS 2017: 186-189
2016
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Calebe Conceição, Gracieli Posser, Ricardo Reis:
Reducing the number of transistors with gate clustering. LASCAS 2016: 163-166
2015
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Calebe Conceição, Ricardo Reis:
Efficient emulation of quantum circuits on classical hardware. LASCAS 2015: 1-4

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